Výsledky vyhledávání - "algorithms implemented in hardware"

The End of Moore's Law: A New Beginning for Information Technology Autor Theis, Thomas N., Wong, H.-S. Philip

“…The insights contained in Gordon Moore's now famous 1965 and 1975 papers have broadly guided the development of semiconductor electronics for over 50 years…”
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Dynamic Sparse Attention for Scalable Transformer Acceleration Autor Liu, Liu, Qu, Zheng, Chen, Zhaodong, Tu, Fengbin, Ding, Yufei, Xie, Yuan

“…Transformers are the mainstream of NLP applications and are becoming increasingly popular in other domains such as Computer Vision. Despite the improvements in…”
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Leveraging Modern C++ in High-Level Synthesis Autor Lahti, Sakari, Rintala, Matti, Hamalainen, Timo D.

“…High-level synthesis (HLS) enables the automated conversion of high-level language algorithms into synthesizable register-transfer level code, allowing…”
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Majority-Logic, its applications, and atomic-scale embodiments Autor Parhami, Behrooz, Abedi, Dariush, Jaberipur, Ghassem

“…Today's computing is increasingly data-intensive, heralding the age of big data. With greater data volumes, come the needs for faster processing, greater…”
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A Fully-Pipelined Hardware Design for Gaussian Mixture Models Autor Conghui He, Haohuan Fu, Ce Guo, Luk, Wayne, Guangwen Yang

“…Gaussian Mixture Models (GMMs) are widely used in many applications such as data mining, signal processing and computer vision, for probability density…”
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A Gaussian noise generator for hardware-based simulations Autor Lee, D.-U., Luk, W., Villasenor, J.D., Cheung, P.Y.K.

“…Hardware simulation offers the potential of improving code evaluation speed by orders of magnitude over workstation or PC-based simulation. We describe a…”
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A hardware Gaussian noise generator using the Box-Muller method and its error analysis Autor Lee, D.-U., Villasenor, J.D., Luk, W., Leong, P.H.W.

“…We present a hardware Gaussian noise generator based on the Box-Muller method that provides highly accurate noise samples. The noise generator can be used as a…”
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Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations Autor Dong-U Lee, Cheung, R.C.C., Luk, W., Villasenor, J.D.

“…This paper examines the hardware implementation trade-offs when evaluating functions via piecewise polynomial approximations and interpolations for precisions…”
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Adapting Computer Arithmetic Structures to Sustainable Supercomputing in Low-Power, Majority-Logic Nanotechnologies Autor Jaberipur, Ghassem, Parhami, Behrooz, Abedi, Dariush

“…Petascale supercomputers are already pushing power boundaries that can be supplied or dissipated cost-effectively; greater challenges await us in the era of…”
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Word-Based Montgomery Modular Multiplication Algorithm for Low-Latency Scalable Architectures Autor Shieh, Ming-Der, Lin, Wen-Ching

“…Modular multiplication is a crucial operation in public key cryptosystems like RSA and elliptic curve cryptography (ECC). This paper presents a new word-based…”
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An Ultra-Low Power, "Always-On" Camera Front-End for Posture Detection in Body Worn Cameras Using Restricted Boltzman Machines Autor Desai, Soham Jayesh, Shoaib, Mohammed, Raychowdhury, Arijit

“…The Internet of Things (IoTs) has triggered rapid advances in sensors, surveillance devices, wearables and body area networks with advanced Human-Computer…”
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Bounding Variable Values and Round-Off Effects Using Handelman Representations Autor Boland, D., Constantinides, G. A.

“…The precision used in an algorithm affects the error and performance of individual computations, the memory usage, and the potential parallelism for a fixed…”
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FPGA-Based Real-Time Implementation of Detection Algorithm for Automatic Traffic Surveillance Sensor Network Autor Wójcikowski, Marek, Żaglewski, Robert, Pankiewicz, Bogdan

“…This paper describes the FPGA-based hardware implementation of an algorithm for an automatic traffic surveillance sensor network. The aim of the algorithm is…”
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A new solution to the hyperbolic tangent implementation in hardware: polynomial modeling of the fractional exponential part Autor Nascimento, Ivo, Jardim, Ricardo, Morgado-Dias, Fernando

“…The most difficult part of an artificial neural network to implement in hardware is the nonlinear activation function. For most implementations, the function…”
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Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method Autor Cheung, R.C.C., Dong-U Lee, Luk, W., Villasenor, J.D.

“…We present an automated methodology for producing hardware-based random number generator (RNG) designs for arbitrary distributions using the inverse cumulative…”
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FPGA-Based Virtual Screening Acceleration of Rigid-Molecule Docking Autor Navarro, Denis, Lucia, Oscar, Gil-Narvion, Jose M., Jimenez, Oscar

“…Virtual screening is a key process used to identify the most suitable molecule combinations when developing a new drug. Molecule docking is a commonly used…”
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An embedded co-processor for accelerating window joins over uncertain data streams Autor Qian, Jiangbo, Li, Youming, Wang, Yongli, Chen, Huahui, Dong, Yihong

“…In many new applications fields, such as surveillance, networks, and sensor technologies, the generating data are time-varying, unpredictable, uncertain,…”
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An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization Autor Jung Sub Kim, Lanping Deng, Mangalagiri, P., Irick, K., Sobti, K., Kandemir, M., Narayanan, V., Chakrabarti, C., Pitsianis, N., Xiaobai Sun

“…This paper describes TANOR, an automated framework for designing hardware accelerators for numerical computation on reconfigurable platforms. Applications…”
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An embedded multi-core biometric identification system Autor Danese, G., Giachero, M., Leporati, F., Nazzicari, N.

“…Biometric identification systems exploit automated methods of recognition based on physiological or behavioural characteristics. Among these, fingerprints are…”
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Self-Reconfigurable Embedded Systems on Low-Cost FPGAs Autor Gonzalez, I., Aguayo, E., Lopez-Buedo, S.

“…Hardware acceleration significantly increases the performance of embedded systems built on programmable logic. allowing an fpga-based mlcroblaze processor to…”
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