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  1. 1

    HexT5: Unified Pre-Training for Stripped Binary Code Information Inference by Xiong, Jiaqi, Chen, Guoqiang, Chen, Kejiang, Gao, Han, Cheng, Shaoyin, Zhang, Weiming

    ISSN: 2643-1572
    Published: IEEE 11.09.2023
    “…Decompilation is a widely used process for reverse engineers to significantly enhance code readability by lifting assembly code to a higher-level C-like…”
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    Conference Proceeding
  2. 2

    Speculative Decoding for Verilog: Speed and Quality, All in One by Xu, Changran, Liu, Yi, Zhou, Yunhao, Huang, Shan, Xu, Ningyi, Xu, Qiang

    Published: IEEE 22.06.2025
    “…The rapid advancement of large language models (LLMs) has revolutionized code generation tasks across various programming languages. However, the unique…”
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    Conference Proceeding
  3. 3

    Whose Baseline Compiler is it Anyway? by Titzer, Ben L.

    ISSN: 2643-2838
    Published: IEEE 02.03.2024
    “…Compilers face an intrinsic tradeoff between compilation speed and code quality. The tradeoff is particularly stark in a dynamic setting where JIT compilation…”
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  4. 4

    Experiences Building an MLIR-Based SYCL Compiler by Tiotto, Ettore, Perez, Victor, Tsang, Whitney, Sommer, Lukas, Oppermann, Julian, Lomuller, Victor, Goli, Mehdi, Brodman, James

    ISSN: 2643-2838
    Published: IEEE 02.03.2024
    “…Similar to other programming models, compilers for SYCL, the open programming model for heterogeneous computing based on C++, would benefit from access to…”
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  5. 5

    mlirSynth: Automatic, Retargetable Program Raising in Multi-Level IR Using Program Synthesis by Brauckmann, Alexander, Polgreen, Elizabeth, Grosser, Tobias, O'Boyle, Michael F. P.

    Published: IEEE 21.10.2023
    “…MLIR is an emerging compiler infrastructure for modern hardware, but existing programs cannot take advantage of MLIR's high-performance compilation if they are…”
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  6. 6

    A System-Level Dynamic Binary Translator Using Automatically-Learned Translation Rules by Jiang, Jinhu, Liang, Chaoyi, Dong, Rongchao, Yang, Zhaohui, Zhou, Zhongjun, Wang, Wenwen, Yew, Pen-Chung, Zhang, Weihua

    ISSN: 2643-2838
    Published: IEEE 02.03.2024
    “…System-level emulators have been used extensively for the design, debugging and evaluation of the system software. They work by providing a system-level…”
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  7. 7
  8. 8

    Adora Compiler: End-to-End Optimization for High-Efficiency Dataflow Acceleration and Task Pipelining on CGRAs by Lou, Jiahang, Zhu, Qilong, Dai, Yuan, Zhong, Zewei, Yin, Wenbo, Wang, Lingli

    Published: IEEE 22.06.2025
    “…To fully harness emerging computing architectures, compilers must provide intuitive input handling alongside powerful code optimization to unlock maximum…”
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    Conference Proceeding
  9. 9

    Polygeist: Raising C to Polyhedral MLIR by Moses, William S., Chelini, Lorenzo, Zhao, Ruizhe, Zinenko, Oleksandr

    Published: IEEE 01.09.2021
    “…We present Polygeist, a new compilation flow that connects the MLIR compiler infrastructure to cutting edge polyhedral optimization tools. It consists of a C…”
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  10. 10

    oneDNN Graph Compiler: A Hybrid Approach for High-Performance Deep Learning Compilation by Li, Jianhui, Qin, Zhennan, Mei, Yijie, Cui, Jingze, Song, Yunfei, Chen, Ciyong, Zhang, Yifei, Du, Longsheng, Cheng, Xianhang, Jin, Baihui, Zhang, Yan, Ye, Jason, Lin, Eric, Lavery, Dan

    ISSN: 2643-2838
    Published: IEEE 02.03.2024
    “…With the rapid development of deep learning models and hardware support for dense computing, the deep learning (DL) workload characteristics changed…”
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  11. 11

    Representing Data Collections in an SSA Form by McMichen, Tommy, Greiner, Nathan, Zhong, Peter, Sossai, Federico, Patel, Atmn, Campanoni, Simone

    ISSN: 2643-2838
    Published: IEEE 02.03.2024
    “…Compiler research and development has treated computation as the primary driver of performance improvements in C/C++ programs, leaving memory optimizations as…”
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  12. 12

    Bridging Gaps in LLM Code Translation: Reducing Errors with Call Graphs and Bridged Debuggers by Luo, Yang, Yu, Richard, Zhang, Fajun, Liang, Ling, Xiong, Yongqiang

    ISSN: 2643-1572
    Published: ACM 27.10.2024
    “…When using large language models (LLMs) for code translation of complex software, numerous compilation and runtime errors can occur due to insufficient context…”
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  13. 13

    PyraNet: A Multi-Layered Hierarchical Dataset for Verilog by Nadimi, Bardia, Boutaib, Ghali Omar, Zheng, Hao

    Published: IEEE 22.06.2025
    “…Recently, there has been a growing interest in leveraging Large Language Models for Verilog code generation. However, the current quality of the generated…”
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  14. 14

    Compiler Auto-Tuning via Critical Flag Selection by Zhu, Mingxuan, Hao, Dan

    ISSN: 2643-1572
    Published: IEEE 11.09.2023
    “…Widely used compilers like GCC usually have hundreds of optimizations controlled by optimization flags, which can be enabled or disabled during compilation to…”
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  15. 15

    Toast: A Heterogeneous Memory Management System by Bailleu, Maurice, Stavrakakis, Dimitrios, Rocha, Rodrigo, Chakraborty, Soham, Garg, Deepak, Bhatotia, Pramod

    Published: ACM 13.10.2024
    “…Modern applications employ several heterogeneous memory types for improved performance, security, and reliability. To manage them, programmers must currently…”
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  16. 16

    PIMCOMP: A Universal Compilation Framework for Crossbar-based PIM DNN Accelerators by Sun, Xiaotian, Wang, Xinyu, Li, Wanqian, Wang, Lei, Han, Yinhe, Chen, Xiaoming

    Published: IEEE 09.07.2023
    “…Crossbar-based PIM DNN accelerators can provide massively parallel in-situ operations. A specifically designed compiler is important to achieve high…”
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  17. 17

    Automatic End-to-End Joint Optimization for Kernel Compilation on DSPs by Zhao, Xiaolei, Chen, Zhaoyun, Shi, Yang, Wen, Mei, Zhang, Chunyun

    Published: IEEE 09.07.2023
    “…Digital signal processors (DSPs) commonly adopt VLIW-SIMD architecture and are extensively applied in most compute-heavy embedded sensing applications. The…”
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  18. 18

    PolyTOPS: Reconfigurable and Flexible Polyhedral Scheduler by Consolaro, Gianpietro, Zhang, Zhen, Razanajato, Harenome, Lossing, Nelson, Tchoulak, Nassim, Susungi, Adilla, Araujo Alves, Artur Cesar, Zhang, Renwei, Barthou, Denis, Ancourt, Corinne, Bastoul, Cedric

    ISSN: 2643-2838
    Published: IEEE 02.03.2024
    “…Polyhedral techniques have been widely used for automatic code optimization in low-level compilers and higher-level processes. Loop optimization is central to…”
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  19. 19

    An Input-Aware Sparse Tensor Compiler Empowered by Vectorized Acceleration by He, Xianhao, Wang, Haotian, Zhang, Jiapeng, Yang, Wangdong, Chronopoulos, Anthony Theodore, Li, Kenli

    Published: IEEE 22.06.2025
    “…Sparsity is widely prevalent in real-world applications, yet existing compiler optimizations and code generation techniques for sparse computations remain…”
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  20. 20

    Rewire: Advancing CGRA Mapping Through a Consolidated Routing Paradigm by Li, Zhaoying, Wu, Dan, Wijerathne, Dhananjaya, Chen, Dan, Li, Huize, Tan, Cheng, Mitra, Tulika

    Published: IEEE 22.06.2025
    “…Coarse-Grained Reconfigurable Arrays (CGRAs) balance the performance and power efficiency in computing systems. Effective compilers play a crucial role in…”
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