Search Results - "Loop Level Parallelization"

Multiple execution of the same MPI application: exploiting parallelism at hotspots with minimal code changes by Himstedt, Kai

“…For a typical climate model, parallelization based on a domain decomposition is a predominant technique to speed up its computation as an MPI (Message Passing…”
Get full text

INTERNATIONAL PATENT: MYNATIX LTD FILES APPLICATION FOR "HIGH-PERFORMANCE CODE PARALLELIZATION COMPILER WITH LOOP-LEVEL PARALLELIZATION"

Get full text

Just-in-Time Compilation-Inspired Methodology for Parallelization of Compute Intensive Java Code by Mustafa, Ghulam, Mahmood, Waqar, Ghani, Muhammad Usman

“…Compute intensive programs generally consume significant fraction of execution time in a small amount of repetitive code. Such repetitive code is commonly…”
Get full text

Scalable parallel implementation of exact inference in Bayesian networks by Namasivayam, V.K., Prasanna, V.K.

“…We present a scalable parallel implementation for exact inference in Bayesian networks. We explore two levels of parallelization: top level parallelization…”
Get full text

Hybrid Approach for Parallelization of Sequential Code with Function Level and Block Level Parallelization by Ashwin Kumar, K., Aasish Kumar Pappu, Sarath Kumar, K., Sudip Sanyal

“…Automatic parallelization of a sequential code is about finding parallel segments in the code and executing these segments parallely by sending them to…”
Get full text

Acceleration of Semiempirical QM/MM Methods through Message Passage Interface (MPI), Hybrid MPI/Open Multiprocessing, and Self-Consistent Field Accelerator Implementations by Ojeda-May, Pedro, Nam, Kwangho

“…The strategy and implementation of scalable and efficient semiempirical (SE) QM/MM methods in CHARMM are described. The serial version of the code was first…”
Get more information

Programming parallel dense matrix factorizations and inversion for new-generation NUMA architectures by Catalán, Sandra, Igual, Francisco D., Herrero, José R., Rodríguez-Sánchez, Rafael, Quintana-Ortí, Enrique S.

“… by proposing multi-domain implementations for DMFI plus a hybrid task- and loop-level parallelization…”
Get full text

Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming Framework by Qiang Liu, Constantinides, G.A., Masselos, K., Cheung, P.

“…) decisions and loop-level parallelization, in the context of field-programmable-gate-array-targeted hardware compilation…”
Get full text

Numerical methods used in fusion science numerical modeling by Yagi, M.

“…) parallel programing are introduced and the loop-level parallelization is shown as an example…”
Get full text

A Study on the Improvement of Athena++ Solvers for HPC-AI Applications by Chae, Cheol-Joo, Lee, Hyunjo, Jung, Hyun Mi

“… Key strategies include selective input array transfer to minimize memory overhead, CPU-side preprocessing of external functions, and loop-level parallelization within CUDA kernels…”
Get full text

Improved Affine Partition Algorithm for Compile-Time and Runtime Performance by Xinyu, Yuan, Ying, Li, Shuiguang, Deng, Jie, Cheng

Get full text

Parallel Block Preconditioning Techniques for the Numerical Simulation of the Shallow Water Flow Using Finite Element Methods by Cai, Y., Navon, I.M.

“…In this paper, we report our work on applying Krylov iterative methods, accelerated by parallelizable domain-decomposed (DD) preconditioners, to the solution…”
Get full text

Learning to Parallelize with OpenMP by Augmented Heterogeneous AST Representation by Chen, Le, Quazi Ishtiaque Mahmud, Phan, Hung, Ahmed, Nesreen K, Jannesari, Ali

“…Detecting parallelizable code regions is a challenging task, even for experienced developers. Numerous recent studies have explored the use of machine learning…”
Get full text

Two Roads to Parallelism: From Serial Code to Programming with STAPL by Rauchwerger, Lawrence

“… In the first part we introduce the Hybrid Analysis (HA) compiler framework that can seamlessly integrate static and run-time analysis of memory references into a single framework capable of full automatic loop level parallelization…”
Get full text

An easily-implemented, block-based fast marching method with superior sequential and parallel performance by Yang, Jianming

“…The fast marching method is well-known for its worst-case optimal computational complexity in solving the Eikonal equation, and has been employed in numerous…”
Get full text

A generalized GCD test based affine partitioning algorithm by Yuan Xinyu, Li Ying, Deng Shuiguang, Cheng Jie

“… The affine partitioning algorithm put forward by the SUIF compiler team has been proved to be successful in automatic discovery of the loop-level parallelization in programs…”
Get full text

Data reuse and parallelism in hardware compilation by Liu, Qiang

“…This thesis presents a methodology to automatically determine a data memory organisation at compiletime, suitable to exploit data reuse and loop-level parallelization, in order to achieve high…”
Get full text

Adaptive Parallelization and Optimization for the JAMAICA Chip Multi-Processor Architecture by Zhao, Jisheng

“…Chip Multi-Processor (CMP) systems are now very popular. This trend to have multicore and multi-threading makes the system increasingly difficult to target…”
Get full text

Combining data reuse exploitationwith data-level parallelization for FPGA targeted hardware compilation: A geometric programming framework by Qiang Liu, Constantinides, G.A., Masselos, K., Cheung, P.Y.K.

“…) exploitation and loop-level parallelization, in the context of FPGA-targeted hardware compilation…”
Get full text

Parallelization and performance optimization of bioinformatics and biomedical applications targeted to advanced computer architectures by Niu, Yanwei

“…In this dissertation, we focus on three representative applications targeted to advanced computer architectures: parallel Hmmpfam (Hidden Markov Model for…”
Get full text