Výsledky vyhľadávania - "Hardware Integrated circuits Reconfigurable logic and FPGAs"

Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration Autor Genc, Hasan, Kim, Seah, Amid, Alon, Haj-Ali, Ameer, Iyer, Vighnesh, Prakash, Pranav, Zhao, Jerry, Grubb, Daniel, Liew, Harrison, Mao, Howard, Ou, Albert, Schmidt, Colin, Steffl, Samuel, Wright, John, Stoica, Ion, Ragan-Kelley, Jonathan, Asanovic, Krste, Nikolic, Borivoje, Shao, Yakun Sophia

“…DNN accelerators are often developed and evaluated in isolation without considering the cross-stack, system-level effects in real-world environments. This…”
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Caffeine: Towards uniformed representation and acceleration for deep convolutional neural networks Autor Chen Zhang, Zhenman Fang, Peipei Zhou, Peichen Pan, Jason Cong

“…With the recent advancement of multilayer convolutional neural networks (CNN), deep learning has achieved amazing success in many areas, especially in visual…”
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DSPlacer: DSP Placement for FPGA-based CNN Accelerator Autor Xie, Baohui, Zhu, Xinrui, Lu, Zhiyuan, Pu, Yuan, Wu, Tongkai, Zou, Xiaofeng, Yu, Bei, Chen, Tinghuan

“…Deploying convolutional neural networks (CNNs) on hardware platforms like Field Programmable Gate Arrays (FPGAs) has garnered significant attention due to…”
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ANT: Exploiting Adaptive Numerical Data Type for Low-bit Deep Neural Network Quantization Autor Guo, Cong, Zhang, Chen, Leng, Jingwen, Liu, Zihan, Yang, Fan, Liu, Yunxin, Guo, Minyi, Zhu, Yuhao

“…Quantization is a technique to reduce the computation and memory cost of DNN models, which are getting increasingly large. Existing quantization solutions use…”
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Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks Autor Boroumand, Amirali, Ghose, Saugata, Akin, Berkin, Narayanaswami, Ravi, Oliveira, Geraldo F., Ma, Xiaoyu, Shiu, Eric, Mutlu, Onur

“…Emerging edge computing platforms often contain machine learning (ML) accelerators that can accelerate inference for a wide range of neural network (NN)…”
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CoNDA: Efficient Cache Coherence Support for Near-Data Accelerators Autor Boroumand, Amirali, Ghose, Saugata, Patel, Minesh, Hassan, Hasan, Lucia, Brandon, Ausavarungnirun, Rachata, Hsieh, Kevin, Hajinazar, Nastaran, Malladi, Krishna T., Zheng, Hongzhong, Mutlu, Onur

“…Specialized on-chip accelerators are widely used to improve the energy efficiency of computing systems. Recent advances in memory technology have enabled…”
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Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design Autor Fan, Hongxiang, Chau, Thomas, Venieris, Stylianos I., Lee, Royson, Kouris, Alexandros, Luk, Wayne, Lane, Nicholas D., Abdelfattah, Mohamed S.

“…Attention-based neural networks have become pervasive in many AI tasks. Despite their excellent algorithmic performance, the use of the attention mechanism and…”
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BlockGNN: Towards Efficient GNN Acceleration Using Block-Circulant Weight Matrices Autor Zhou, Zhe, Shi, Bizhao, Zhang, Zhe, Guan, Yijin, Sun, Guangyu, Luo, Guojie

“…In recent years, Graph Neural Networks (GNNs) appear to be state-of-the-art algorithms for analyzing non-euclidean graph data. By applying deep-learning to…”
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NAAS: Neural Accelerator Architecture Search Autor Lin, Yujun, Yang, Mengtian, Han, Song

“…Data-driven, automatic design space exploration of neural accelerator architecture is desirable for specialization and productivity. Previous frameworks focus…”
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Laconic Deep Learning Inference Acceleration Autor Sharify, Sayeh, Lascorz, Alberto Delmas, Mahmoud, Mostafa, Nikolic, Milos, Siu, Kevin, Stuart, Dylan Malone, Poulos, Zissis, Moshovos, Andreas

“…We present a method for transparently identifying ineffectual computations during inference with Deep Learning models. Specifically, by decomposing…”
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High-Performance FPGA-based Accelerator for Bayesian Neural Networks Autor Fan, Hongxiang, Ferianc, Martin, Rodrigues, Miguel, Zhou, Hongyu, Niu, Xinyu, Luk, Wayne

“…Neural networks (NNs) have demonstrated their potential in a wide range of applications such as image recognition, decision making or recommendation systems…”
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DFX: A Low-latency Multi-FPGA Appliance for Accelerating Transformer-based Text Generation Autor Hong, Seongmin, Moon, Seungjae, Kim, Junsoo, Lee, Sungjae, Kim, Minsub, Lee, Dongsoo, Kim, Joo-Young

“…Transformer is a deep learning language model widely used for natural language processing (NLP) services in datacenters. Among transformer models, Generative…”
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PolySA: Polyhedral-Based Systolic Array Auto-Compilation Autor Cong, Jason, Wang, Jie

“…Automatic systolic array generation has long been an interesting topic due to the need to reduce the lengthy development cycles of manual designs. Existing…”
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CrossLight: A Cross-Layer Optimized Silicon Photonic Neural Network Accelerator Autor Sunny, Febin, Mirza, Asif, Nikdast, Mahdi, Pasricha, Sudeep

“…Domain-specific neural network accelerators have seen growing interest in recent years due to their improved energy efficiency and performance compared to CPUs…”
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SGX-FPGA: Trusted Execution Environment for CPU-FPGA Heterogeneous Architecture Autor Xia, Ke, Luo, Yukui, Xu, Xiaolin, Wei, Sheng

“…Trusted execution environments (TEEs), such as Intel SGX, have become a popular security primitive with minimum trusted computing base (TCB) and attack…”
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WSQ-AdderNet: Efficient Weight Standardization based Quantized AdderNet FPGA Accelerator Design with High-Density INT8 DSP-LUT Co-Packing Optimization Autor Zhang, Yunxiang, Sun, Biao, Jiang, Weixiong, Ha, Yajun, Hu, Miao, Zhao, Wenfeng

“…Convolutional neural networks (CNNs) have been widely adopted for various machine intelligence tasks. Nevertheless, CNNs are still known to be computational…”
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FPGA-TrustZone: Security Extension of TrustZone to FPGA for SoC-FPGA Heterogeneous Architecture Autor Wang, Shupeng, Fan, Xindong, Xu, Xiao, Wang, Shuchen, Ju, Lei, Zhou, Zimeng

“…To address the growing security issues faced by ARM-based mobile devices today, TrustZone was adopted to provide a trusted execution environment (TEE) to…”
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DuoQ: A DSP Utilization-aware and Outlier-free Quantization for FPGA-based LLMs Acceleration Autor Yu, Zhuoquan, Ji, Huidong, Cao, Yue, Wu, Junfu, Yan, Xiaoze, Zheng, Lirong, Zou, Zhuo

“…Quantization enables efficient deployment of large language models (LLMs) on FPGAs, but its presence of outliers affects the accuracy of the quantized model…”
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April: Accuracy-Improved Floating-Point Approximation For Neural Network Accelerators Autor Chen, Yonghao, Zou, Jiaxiang, Chen, Xinyu

“…Neural Networks (NNs) have achieved breakthroughs in computer vision and natural language processing. However, modern models are computationally expensive,…”
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An Algorithm-Hardware Co-design Based on Revised Microscaling Format Quantization for Accelerating Large Language Models Autor Hao, Yingbo, Chen, Huangxu, Zou, Yi, Yang, Yanfeng

“…The narrow-bit-width data format is crucial for reducing the computation and storage costs of modern deep learning applications, particularly in large language…”
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