Search Results - "Hardware Integrated circuits Logic circuits Arithmetic AND datapath circuits"

Bit-pragmatic deep neural network computing by Albericio, Jorge, Delmás, Alberto, Judd, Patrick, Sharify, Sayeh, O'Leary, Gerard, Genov, Roman, Moshovos, Andreas

“…Deep Neural Networks expose a high degree of parallelism, making them amenable to highly data parallel architectures. However, data-parallel architectures…”
Get full text

A low latency generic accuracy configurable adder by Shafique, Muhammad, Ahmad, Waqas, Hafiz, Rehan, Henkel, Jorg

“…High performance approximate adders typically comprise of multiple smaller sub-adders, carry prediction units and error correction units. In this paper, we…”
Get full text

A new stochastic computing multiplier with application to deep convolutional neural networks by Hyeonuk Sim, Jongeun Lee

“…Stochastic computing (SC) allows for extremely low cost and low power implementations of common arithmetic operations. However inherent random fluctuation…”
Get full text

Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks by Kyounghoon Kim, Jungki Kim, Joonsang Yu, Jungwoo Seo, Jongeun Lee, Kiyoung Choi

“…This paper presents an efficient DNN design with stochastic computing. Observing that directly adopting stochastic computing to DNN has some challenges…”
Get full text

Stochastic circuits for real-time image-processing applications by Alaghi, Armin, Li, Cheng, Hayes, John P.

“…Real-time image-processing applications impose severe design constraints in terms of area and power. Examples of interest include retinal implants for vision…”
Get full text

Architectural-space exploration of approximate multipliers by Rehman, Semeen, El-Harouni, Walaa, Shafique, Muhammad, Kumar, Akash, Henkel, Jorg

“…This paper presents an architectural-space exploration methodology for designing approximate multipliers. Unlike state-of-the-art, our methodology generates…”
Get full text

Equivalence among stochastic logic circuits and its application by Te-Hsuan Chen, Hayes, John P.

“…Stochastic computing (SC) uses standard logic to process pseudo-random bit-streams denoting probabilities. It implements arithmetic operations by extremely…”
Get full text

High performance reliable variable latency carry select addition by Du, Kai, Varman, Peter, Mohanram, Kartik

“…Speculative adders have attracted strong interest for reducing critical path delays to sub-logarithmic delays by exploiting the trade-offs between reliability…”
Get full text

PolyCleaner: Clean your Polynomials before Backward Rewriting to verify Million-gate Multipliers by Mahzoon, Alireza, Grosse, Daniel, Drechsler, Rolf

“…Nowadays, a variety of multipliers are used in different computationally intensive industrial applications. Most of these multipliers are highly parallelized…”
Get full text

QuAd: Design and analysis of Quality-area optimal Low-Latency approximate Adders by Hanif, Muhammad Abdullah, Hafiz, Rehan, Hasan, Osman, Shafique, Muhammad

“…Approximate circuits exploit error resilience property of applications to tradeoff computation quality (accuracy) for gaining advantage in terms of…”
Get full text

Logic Synthesis for Digital In-Memory Computing by Haq Rashed, Muhammad Rashedul, Kumar Jha, Sumit, Ewetz, Rickard

“…Processing in-memory is a promising solution strategy for accelerating data-intensive applications. While analog in-memory computing is extremely efficient,…”
Get full text

Comparison-Free Bit-Stream Generation for Cost-Efficient Unary Computing by Banitaba, Faeze S., Jalilvand, Amir Hossein, Najafi, M. Hassan, Aygun, Sercan

“…Today, unconventional hardware design techniques based on simple data representations are receiving more and more attention. Unary computing is one of these…”
Get full text

Fast and Compact Interleaved Modular Multiplication based on Carry Save Addition by Mazonka, Oleg, Chielle, Eduardo, Soni, Deepraj, Maniatakos, Michail

“…Improving fully homomorphic encryption computation by designing specialized hardware is an active topic of research. The most prominent encryption schemes…”
Get full text

Precon: A Precision-Convertible Architecture for Accelerating Quantized Deep Learning Models across Various Domains Including LLMs by Park, Jongwoo, Kim, Hyeonseong, Han, Jiyun, Choi, Seungkyu

“…The sensitivity of LLMs to quantization has driven the development of hardware accelerators tailored for specific low-precision configurations such as…”
Get full text

Dual-Issue Execution of Mixed Integer and Floating-Point Workloads on Energy-Efficient In-Order RISC-V Cores by Colagrande, Luca, Benini, Luca

“…To meet the computational requirements of modern workloads under tight energy constraints, general-purpose accelerator architectures have to integrate an…”
Get full text

Measurement-based uncomputation of quantum circuits for modular arithmetic by Luongo, Alessandro, Miti, Antonio Michele, Narasimhachar, Varun, Sireesh, Adithya

“…Measurement-based uncomputation (MBU) is a technique used to perform probabilistic uncomputation of quantum circuits. We formalize this technique for the case…”
Get full text

BBAL: A Bidirectional Block Floating Point-Based Quantisation Accelerator for Large Language Models by Han, Xiaomeng, Cheng, Yuan, Wang, Jing, Lu, Junyang, Wang, Hui, Zhang, X.x., Xu, Ning, Yang, Dawei, Jiang, Zhe

“…Large language models (LLMs), with their billions of parameters, pose substantial challenges for deployment on edge devices, straining both memory capacity and…”
Get full text

Finding the Pareto Frontier of Low-Precision Data Formats and MAC Architecture for LLM Inference by Crafton, Brian, Peng, Xiaochen, Sun, Xiaoyu, Lele, Ashwin, Zhang, Bo, Khwa, Win-San, Akarvardar, Kerem

“…To accelerate AI applications, numerous data formats and physical implementations of matrix multiplication have been proposed, creating a complex design space…”
Get full text

An Enhanced Data Packing Method for General Matrix Multiplication in Brakerski/Fan-Vercauteren Scheme by Meng, Xiangchen, Tan, Yan, Jiang, Zijun, Lyu, Yangdi

“…General Matrix-Matrix Multiplication (GEMM) stands as the most ubiquitous operation in machine learning applications. However, performing GEMM within Fully…”
Get full text

AdaS: A Fast and Energy-Efficient CNN Accelerator Exploiting Bit-Sparsity by Lin, Xiaolong, Li, Gang, Liu, Zizhao, Liu, Yadong, Zhang, Fan, Song, Zhuoran, Jing, Naifeng, Liang, Xiaoyao

“…Bit-sparsity has shown its promise in CNN acceleration. However, prior bit-sparse accelerators have two drawbacks: 1) a large number of zero values are…”
Get full text