Search Results - "Field-programmable gate array implementations"

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  1. 1

    Density Encoding Enables Resource-Efficient Randomly Connected Neural Networks by Kleyko, Denis, Kheffache, Mansour, Frady, E. Paxon, Wiklund, Urban, Osipov, Evgeny

    ISSN: 2162-237X, 2162-2388, 2162-2388
    Published: Piscataway IEEE 01.08.2021
    “…The deployment of machine learning algorithms on resource-constrained edge devices is an important challenge from both theoretical and applied points of view…”
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    Journal Article
  2. 2

    Systolic array design space exploration of interpolators for multi-rate systems by Shoukry, Mohammed, Gebali, Fayez, Agathoklis, Panajotis

    ISSN: 1751-858X, 1751-8598, 1751-8598
    Published: Stevenage The Institution of Engineering and Technology 01.10.2019
    Published in IET circuits, devices & systems (01.10.2019)
    “…This study presents the development and comparison of interpolator systolic array designs and implementations. Systematic methodology was applied to the…”
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    Journal Article
  3. 3

    Decimator systolic arrays design space exploration for multirate signal processing applications by Shoukry, Mohammed, Gebali, Fayez, Agathoklis, Panajotis

    ISSN: 1751-858X, 1751-8598, 1751-8598
    Published: Stevenage The Institution of Engineering and Technology 01.11.2019
    Published in IET circuits, devices & systems (01.11.2019)
    “…This study presents a new systolic array structure for a decimator that merges the antialiasing finite impulse response (FIR) filter with the downsampler. The…”
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    Journal Article
  4. 4

    A new class of Hamiltonian conservative chaotic systems with multistability and design of pseudo-random number generator by Dong, Enzeng, Yuan, Mingfeng, Du, Shengzhi, Chen, Zengqiang

    ISSN: 1088-8691, 0307-904X
    Published: New York Elsevier BV 01.09.2019
    Published in Applied Mathematical Modelling (01.09.2019)
    “…Compared to dissipative chaotic system, conservative chaotic systems have some attractive features valuable for engineering applications, such as security…”
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    Journal Article
  5. 5

    Enhancing driver assistance systems with field-programmable gate array based image Filtering: Implementation of adaptive image processing framework for real-time filtering by Arul Edwin Raj, A., Ahmad, Nabihah Binti, Jeffin Gracewell, J., Renugadevi, R., Kalaivani, C.T.

    ISSN: 0952-1976
    Published: Elsevier Ltd 27.11.2025
    “…Advanced Driver Assistance Systems (ADAS) aim to enhance driving safety and comfort by automating various vehicle functions. These systems rely heavily on…”
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    Journal Article
  6. 6

    CardioLike-Net: An edge-end inter-patient arrhythmia classifier with quantization-aware-training for wearable ECG applications by Xu, Xinzi, Suo, Yanxing, Cai, Qiao, Zhang, Yunfang, Chen, Qinyu, Gao, Chang, Wang, Guoxing, Zhao, Yang

    ISSN: 1746-8094
    Published: Elsevier Ltd 01.02.2026
    Published in Biomedical signal processing and control (01.02.2026)
    “…Wearable electrocardiogram monitors equipped with edge-end classifier is a transformative tool for managing cardiovascular diseases. Whereas, electrocardiogram…”
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    Journal Article
  7. 7

    Design and evaluation of clock-gating-based approximate multiplier for error-tolerant applications by Venkata Sudhakar, Chowdam, Potladurty, Suresh Babu, Karipireddy, Prasad Reddy

    ISSN: 2089-4864, 2722-2608
    Published: 01.07.2025
    “…The multiplier is an essential component in real-time applications. Even though approximation arithmetic affects output accuracy in multipliers, it offers a…”
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    Journal Article
  8. 8

    Control, synchronisation and antisynchronisation of chaos in two non-identical Josephson junction models via sliding mode control and its FPGA implementation by Ramakrishnan, Balamurali, Tamba, Victor Kamdoum, Metsebo, Jules, Tokoue Ngatcha, DiaNorré, Rajagopal, Karthikeyan

    ISSN: 0973-7111, 0973-7111
    Published: New Delhi Springer India 28.02.2023
    Published in Pramāṇa (28.02.2023)
    “…The control, synchronisation and antisynchronisation of chaos in Josephson junction (JJ) and linear piecewise JJ models via sliding mode control method are…”
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    Journal Article
  9. 9

    FPGA implementation of an Islanding detection technique for microgrid using periodic maxima of superimposed voltage components by Kumar, Praveen, Kumar, Vishal, Pratap, Rajendra

    ISSN: 1751-8687, 1751-8695
    Published: The Institution of Engineering and Technology 11.05.2020
    “…In this study, a novel islanding detection technique (IDT) based on the islanding discrimination factor using the periodic maxima of superimposed voltage…”
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    Journal Article
  10. 10

    Dynamic analyses, FPGA implementation and engineering applications of multi-butterfly chaotic attractors generated from generalised Sprott C system by Lai, Qiang, Zhao, Xiao-Wen, Rajagopal, Karthikeyan, Xu, Guanghui, Akgul, Akif, Guleryuz, Emre

    ISSN: 0304-4289, 0973-7111
    Published: New Delhi Springer India 01.01.2018
    Published in Pramāṇa (01.01.2018)
    “…This paper considers the generation of multi-butterfly chaotic attractors from a generalised Sprott C system with multiple non-hyperbolic equilibria. The…”
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    Journal Article
  11. 11

    FPGA implementation of an arbitrary resample rate, FOH, pulse width modulator by Broadmeadow, Mark A. H, Burstinghaus, Edward J, Walker, Geoffrey R, Ledwich, Gerard F

    ISSN: 2051-3305, 2051-3305
    Published: The Institution of Engineering and Technology 01.06.2019
    “…This study presents a field-programmable gate array implementation of an advanced pulse-width modulator which combines a first-order hold (FOH) with phase…”
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    Journal Article
  12. 12

    Design and field programmable gate array implementation of cascade neural network based flux estimator for speed estimation in induction motor drives by Venkadesan, Arunachalam, Himavathi, Srinivasan, Sedhuraman, Karthikeyan, Muthuramalingam, A

    ISSN: 1751-8660, 1751-8679, 1751-8679
    Published: The Institution of Engineering and Technology 01.01.2017
    Published in IET electric power applications (01.01.2017)
    “…This study presents design and hardware implementation of cascade neural network (NN) based flux estimator using field programmable gate array (FPGA) for speed…”
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    Journal Article
  13. 13

    Gate diffusion input based 4-bit Vedic multiplier design by Garg, Ankit, Joshi, Garima

    ISSN: 1751-858X, 1751-8598, 1751-8598
    Published: Stevenage The Institution of Engineering and Technology 01.11.2018
    Published in IET circuits, devices & systems (01.11.2018)
    “…A multiplier is one of the key hardware blocks in most of the processors. Multiplication is a lengthy, time-consuming task. Vedic multiplication in field…”
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    Journal Article
  14. 14

    Field programmable gate array implementation of a single-input fuzzy proportional–integral–derivative controller for DC–DC buck converters by Chang, Changyuan, Yuan, Yubo, Jiang, Tianlin, Zhou, Zhongjie

    ISSN: 1755-4535, 1755-4543
    Published: The Institution of Engineering and Technology 18.05.2016
    Published in IET power electronics (18.05.2016)
    “…The design and field programmable gate array implementation of a single-input fuzzy (SIF) proportional–integral–derivative (PID) control scheme applied to…”
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    Journal Article
  15. 15

    Original structure for Walsh–Hadamard transform on sliding window by Tisserand, E, Berviller, Y

    ISSN: 0013-5194, 1350-911X, 1350-911X
    Published: The Institution of Engineering and Technology 05.11.2015
    Published in Electronics letters (05.11.2015)
    “…The Nth-order Walsh–Hadamard transform on a sliding window is described here by means of FIF filters. Factoring the transfer functions of the filters allows…”
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    Journal Article
  16. 16

    Field programmable gate array implementation of variable-bins high efficiency video coding CABAC decoder with path delay optimisation by Menasri, Wahiba, Skoudarli, Abdellah, Belhadj, Aichouche, Azzaz, Mohamed Salah

    ISSN: 1751-9659, 1751-9667
    Published: The Institution of Engineering and Technology 01.05.2019
    Published in IET image processing (01.05.2019)
    “…Context-based adaptive binary arithmetic coding (CABAC) is a single operation mode for entropy coding in the last video coding standard high-efficiency video…”
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    Journal Article
  17. 17

    Resilient training of neural network classifiers with approximate computing techniques for hardware-optimised implementations by Torres, Vitor Ferreira, Torres, Frank Sill

    ISSN: 1751-8601, 1751-861X, 2095-882X, 1751-861X, 2589-0514
    Published: Beijing The Institution of Engineering and Technology 01.11.2019
    “…As Machine Learning applications increase the demand for optimised implementations in both embedded and high-end processing platforms, the industry and…”
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    Journal Article
  18. 18

    FPGA implementation of dynamic channel assignment algorithm for cognitive wireless sensor networks by Martinez, Daniela M, Andrade, Angel G

    ISSN: 0020-7217, 1362-3060
    Published: Abingdon Taylor & Francis 03.07.2015
    Published in International journal of electronics (03.07.2015)
    “…The reliability of wireless sensor networks (WSNs) in industrial applications can be thwarted due to multipath fading, noise generated by industrial equipment…”
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    Journal Article
  19. 19

    An implementation of fuzzy logic controller on the reconfigurable FPGA system by Kim, Daijin

    ISSN: 0278-0046, 1557-9948
    Published: New York IEEE 01.06.2000
    “…This paper concerns an implementation of a fuzzy logic controller (FLC) on a reconfigurable field-programmable gate array (FPGA) system. In the proposed…”
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    Journal Article
  20. 20

    FPGA-Driven Low Power ECG Analyser with Robust Noise Handling by Kalaiselvi, A, Jayadharshine, S., Shanthi, K.G., Geeth, R S Kavee, Tamizhmani, T

    Published: IEEE 04.08.2025
    “…The increasing necessity for wearable medical devices to keep pace with expanding healthcare demands is driving the requirement for effective processing of…”
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    Conference Proceeding