Suchergebnisse - "Dynamically Reconfigurable Resource Array"
-
1
Integer Linear Programming-Based Simultaneous Scheduling and Binding for SiLago Framework
ISSN: 2169-3536, 2169-3536Veröffentlicht: Piscataway IEEE 2024Veröffentlicht in IEEE access (2024)“… Coarse-Grained Reconfigurable Array (CGRA) architectures are potential high-performance and power-efficient platforms. However, mapping applications …”
Volltext
Journal Article -
2
Automating functional unit and register binding for synchoros CGRA platform
ISSN: 0929-5585, 1572-8080, 1572-8080Veröffentlicht: New York Springer US 01.06.2024Veröffentlicht in Design automation for embedded systems (01.06.2024)“… Coarse-grain reconfigurable architectures, which provide high computing throughput, low cost, scalability, and energy efficiency, have grown in popularity in …”
Volltext
Journal Article -
3
Application Level Synthesis: Creating Matrix-Matrix Multiplication Library: A Case Study
ISSN: 2169-3536, 2169-3536Veröffentlicht: Piscataway IEEE 2024Veröffentlicht in IEEE access (2024)“… Efficiently synthesizing an entire application that consists of multiple algorithms for hardware implementation is a very difficult and unsolved problem. One …”
Volltext
Journal Article -
4
Implementation of Image Averaging on DRRA and DiMArch Architectures
Veröffentlicht: IEEE 28.08.2023Veröffentlicht in 2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) (28.08.2023)“… Image averaging is a technique used in image processing to reduce the noise present in an image. Image averaging is computationally intensive, particularly …”
Volltext
Tagungsbericht -
5
Implementation of Sobel Edge Detection on DRRA and DiMArch Architectures
ISSN: 2771-2508Veröffentlicht: IEEE 06.09.2023Veröffentlicht in Proceedings (Euromicro Conference on Digital Systems Design) (06.09.2023)“… Edge detection is a fundamental operation in image processing, serving as a crucial step in various applications such as object recognition, image …”
Volltext
Tagungsbericht -
6
A code reuse method for many-core coarse-grained reconfigurable architecture function library development
ISBN: 161284863X, 9781612848631ISSN: 2325-0631Veröffentlicht: IEEE 01.12.2011Veröffentlicht in 2011 International Symposium on Integrated Circuits (01.12.2011)“… In this paper 1 , a code reuse method is proposed to enhance the efficiency of the function library development of many core coarse-grained reconfigurable …”
Volltext
Tagungsbericht

