Výsledky vyhľadávania - "Data Flow Graph"
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DESIGN AND RESEARCH OF OPERATIONAL AND PIPELINED BINARY NUMBER SORTING DEVICES
ISSN: 1314-2704Vydavateľské údaje: Sofia Surveying Geology & Mining Ecology Management (SGEM) 01.01.2018Vydané v International Multidisciplinary Scientific GeoConference SGEM (01.01.2018)“… The theory of data flow graph of algorithm is studied, which is the basis of graphically specified sorting algorithm and can be paralleled by tiers in the so-called "tier-parallel form", which is the…”
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DSP architecture design essentials
ISBN: 9781441996596, 1441996591, 1441996605, 9781441996602Vydavateľské údaje: New York Springer 2012“…This book addresses the gap between DSP algorithm design and implementation, using an approach to DSP architecture design that merges algorithm and system…”
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E-kniha Kniha -
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An integrated high-level hardware/software partitioning methodology
ISSN: 0929-5585, 1572-8080Vydavateľské údaje: Boston Springer US 01.03.2011Vydané v Design automation for embedded systems (01.03.2011)“…Embedded systems are widely used in many sophisticated applications. To speed the time-to-market cycle, the hardware and software co-design has become one of…”
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Journal Article -
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Integration testing of object-oriented components using finite state machines
ISSN: 0960-0833, 1099-1689Vydavateľské údaje: Chichester, UK John Wiley & Sons, Ltd 01.12.2006Vydané v Software testing, verification & reliability (01.12.2006)“…, transforms the representation into a data flow graph that explicitly identifies the definitions and uses of each state…”
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Combined Split Manufacturing and Logic Obfuscation Based on Emerging Technologies at High Level for Secure 3D IC Design
ISSN: 1558-3899Vydavateľské údaje: IEEE 11.08.2024Vydané v Conference proceedings : Midwest Symposium on Circuits and Systems (11.08.2024)“…) at untrusted foundries. However, many such defense methods are subject to attacks such as Network Flow Attack and Boolean Satisfiability Attack, that have attempted to reconstruct the missing BEOL (Back End Of Line…”
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On the systematic method of conditional control program execution by a PLC
ISSN: 2300-1917, 0239-7528, 2300-1917Vydavateľské údaje: Warsaw De Gruyter Open 01.03.2016Vydané v Bulletin of the Polish Academy of Sciences. Technical sciences (01.03.2016)“… There is presented a systematic and formal method of program analysis based on a data flow graph approach…”
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Journal Article -
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Scheduling with confidence for probabilistic data-flow graphs
ISBN: 0818679042, 9780818679049ISSN: 1066-1395Vydavateľské údaje: IEEE 1997Vydané v Proceedings Great Lakes Symposium on VLSI (1997)“… A probabilistic data-flow graph is employed to model the problem where each node represents a task associated with the probabilistic computation time and a set of edges represents the dependences between the tasks…”
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Foundations of Total Functional Data-Flow Programming
ISSN: 2331-8422Vydavateľské údaje: Ithaca Cornell University Library, arXiv.org 09.06.2014Vydané v arXiv.org (09.06.2014)“…) is divided between the data-flow graph paradigm favored by domain experts, and the functional reactive paradigm favored by academics…”
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Paper -
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Real time pipelined system design through simulated annealing
ISSN: 1383-7621, 1873-6165Vydavateľské údaje: Amsterdam Elsevier B.V 15.12.1996Vydané v Journal of systems architecture (15.12.1996)“…; the program is described through a Control Data Flow Graph (CDFG). We have developed a mapping methodology which assigns to each instruction of CDFG a time step and a HW resource for its execution…”
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Journal Article -
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A framework for high level synthesis using taylor decomposition system
ISBN: 9781303573187, 1303573180Vydavateľské údaje: ProQuest Dissertations & Theses 01.01.2013“…This thesis extends the work and application of Taylor Expansion Diagrams (TED) as a framework for high level synthesis and verification of data-flow and…”
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Dissertation -
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Optimal design of a VLSI processor with spatially and temporally parallel structure
ISSN: 1042-0967, 1520-6440Vydavateľské údaje: New York Wiley Subscription Services, Inc., A Wiley Company 01.08.1997Vydané v Electronics & communications in Japan. Part 3, Fundamental electronic science (01.08.1997)“… In this article, we present a scheduling algorithm for high‐level synthesis, where the input to the scheduler is a behavioral description viewed as a data flow graph…”
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Journal Article -
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Analyzing large spreadsheet programs
ISBN: 9780769520278, 0769520278ISSN: 1095-1350Získať plný textVydavateľské údaje: IEEE 2003
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Optimizing behavioral transformations using Taylor Expansion Diagrams
ISBN: 9780549785941, 0549785949Vydavateľské údaje: ProQuest Dissertations & Theses 01.01.2008“…Optimization of designs specified at higher levels of abstraction than gate-level or register-transfer level (RTL) has been shown to have the greatest impact…”
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Dissertation -
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Synthesizing sequential programs onto reconfigurable computing systems
ISBN: 0549363246, 9780549363248Vydavateľské údaje: ProQuest Dissertations & Theses 01.01.2007“…This dissertation focuses on synthesizing sequential programs on FPGA-based fine-grained reconfigurable computing systems. Reconfigurable computing combines…”
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Dissertation -
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High -level synthesis for dynamically reconfigurable systems
ISBN: 0599693053, 9780599693050Vydavateľské údaje: ProQuest Dissertations & Theses 01.01.2000“… The synthesis methodology is subdivided into the following steps: Firstly, we model the specification in a combined formalism called the extended control data flow graph…”
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Dissertation -
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The Development of Fast DST-I Algorithms for Short-Length Input Sequences
ISSN: 2079-9292, 2079-9292Vydavateľské údaje: Basel MDPI AG 01.12.2024Vydané v Electronics (Basel) (01.12.2024)“… The arithmetic complexity of the developed algorithms is presented in the final table. For each algorithm, we also provide data flow graphs demonstrating the space…”
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Journal Article -
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Optimizing power consumption, area, and delay in behavioral synthesis
ISBN: 0612029638, 9780612029637Vydavateľské údaje: ProQuest Dissertations & Theses 01.01.1995“… hardware module for each operation of a data flow graph, and allocating the operations to precise time slots…”
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Dissertation -
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Passive-Active Flowgraphs for Efficient Modeling and Design of Signal Processing Systems
ISSN: 1939-8018, 1939-8115Vydavateľské údaje: New York Springer US 01.10.2020Vydané v Journal of signal processing systems (01.10.2020)“…In dataflow representations for signal processing systems, applications are represented as directed graphs in which vertices represent computations and edges…”
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Journal Article -
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Automata-based symbolic scheduling for looping DFGs
ISSN: 0018-9340, 1557-9956Vydavateľské údaje: New York IEEE 01.03.2001Vydané v IEEE transactions on computers (01.03.2001)“…This paper presents an exact technique for scheduling looping data-flow graphs that implicitly supports functional pipelining and loop winding…”
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A bi-criteria scheduling heuristic for distributed embedded systems under reliability and real-time constraints
ISBN: 0769520529, 9780769520520Vydavateľské údaje: Los Alamitos Ca IEEE 2004Vydané v 2004 International Conference on Dependable Systems and Networks : 28 June-1 July, 2004, Florence, Italy (2004)“… In this paper, we present a new bi-criteria scheduling heuristic for scheduling data-flow graphs of operations onto parallel heterogeneous architectures according to two criteria…”
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