Search Results - "Computing methodologies → Parallel algorithms"
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1
Restricted Power Diagrams on the GPU
ISSN: 0167-7055, 1467-8659Published: Oxford Blackwell Publishing Ltd 01.05.2021Published in Computer graphics forum (01.05.2021)“…We propose a method to simultaneously decompose a 3D object into power diagram cells and to integrate given functions in each of the obtained simple regions…”
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Journal Article -
2
Versatile Cross-platform Compilation Toolchain for Schrödinger-style Quantum Circuit Simulation
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…While existing quantum hardware resources have limited availability and reliability, there is a growing demand for exploring and verifying quantum algorithms…”
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Conference Proceeding -
3
DARIS: An Oversubscribed Spatio-Temporal Scheduler for Real-Time DNN Inference on GPUs
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…The widespread use of Deep Neural Networks (DNNs) is limited by high computational demands, especially in constrained environments. GPUs, though effective…”
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Conference Proceeding -
4
Skywalker: Efficient Alias-Method-Based Graph Sampling and Random Walk on GPUs
Published: IEEE 01.09.2021Published in 2021 30th International Conference on Parallel Architectures and Compilation Techniques (PACT) (01.09.2021)“…Graph sampling and random walk operations, capturing the structural properties of graphs, are playing an important role today as we cannot directly adopt…”
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Conference Proceeding -
5
MAD-Max Beyond Single-Node: Enabling Large Machine Learning Model Acceleration on Distributed Systems
Published: IEEE 29.06.2024Published in 2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA) (29.06.2024)“…Training and deploying large-scale machine learning models is time-consuming, requires significant distributed computing infrastructures, and incurs high…”
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Conference Proceeding -
6
DenSparSA: A Balanced Systolic Array Approach for Dense and Sparse Matrix Multiplication
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…Numerous studies have proposed hardware architectures to accelerate sparse matrix multiplication, but these approaches often incur substantial area and power…”
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Conference Proceeding -
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HybriMoE: Hybrid CPU-GPU Scheduling and Cache Management for Efficient MoE Inference
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…The Mixture of Experts (MoE) architecture has demonstrated significant advantages as it enables to increase the model capacity without a proportional increase…”
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Conference Proceeding -
8
NDFT: Accelerating Density Functional Theory Calculations via Hardware/Software Co-Design on Near-Data Computing System
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…Linear-response time-dependent Density Functional Theory (LR-TDDFT) is a widely used method for accurately predicting the excited-state properties of physical…”
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Conference Proceeding -
9
Utilizing Parallelism in Smart Contracts on Decentralized Blockchains by Taming Application-Inherent Conflicts
ISSN: 1558-1225Published: ACM 01.05.2022Published in 2022 IEEE/ACM 44th International Conference on Software Engineering (ICSE) (01.05.2022)“…Traditional public blockchain systems typically had very limited transaction throughput because of the bottleneck of the consensus protocol itself. With recent…”
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Conference Proceeding -
10
SFLU: Synchronization-Free Sparse LU Factorization for Fast Circuit Simulation on GPUs
Published: IEEE 05.12.2021Published in 2021 58th ACM/IEEE Design Automation Conference (DAC) (05.12.2021)“…Sparse LU factorization is one of the key building blocks of sparse direct solvers and often dominates the computing time of circuit simulation programs…”
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Conference Proceeding -
11
OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration
Published: IEEE 09.07.2023Published in 2023 60th ACM/IEEE Design Automation Conference (DAC) (09.07.2023)“…Design rule checking (DRC) is an essential procedure in physical verification, yet few open-source DRC tools are accessible in academia. To fill in the gap, we…”
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Conference Proceeding -
12
pSyncPIM: Partially Synchronous Execution of Sparse Matrix Operations for All-Bank PIM Architectures
Published: IEEE 29.06.2024Published in 2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA) (29.06.2024)“…Recent commercial incarnations of processing-in-memory (PIM) maintain the standard DRAM interface and employ the all-bank mode execution to maximize bank-level…”
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Conference Proceeding -
13
Leveraging Difference Recurrence Relations for High-Performance GPU Genome Alignment
Published: ACM 13.10.2024Published in 2024 33rd International Conference on Parallel Architectures and Compilation Techniques (PACT) (13.10.2024)“…Genome pairwise sequence alignment is one of the most computationally intensive workloads in many genomic pipelines, often accounting for over 90% of the…”
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Conference Proceeding -
14
Parallelizing Maximal Clique Enumeration on GPUs
Published: IEEE 21.10.2023Published in 2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT) (21.10.2023)“…We present a GPU solution for exact maximal clique enumeration (MCE) that performs a search tree traversal following the Bron-Kerbosch algorithm. Prior works…”
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Conference Proceeding -
15
Accelerating Fourier and Number Theoretic Transforms using Tensor Cores and Warp Shuffles
Published: IEEE 01.09.2021Published in 2021 30th International Conference on Parallel Architectures and Compilation Techniques (PACT) (01.09.2021)“…The discrete Fourier transform (DFT) and its specialized case, the number theoretic transform (NTT), are two important mathematical tools having applications…”
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Conference Proceeding -
16
Seer: Predictive Runtime Kernel Selection for Irregular Problems
ISSN: 2643-2838Published: IEEE 02.03.2024Published in Proceedings / International Symposium on Code Generation and Optimization (02.03.2024)“…Modern GPUs are designed for regular problems and suffer from load imbalance when processing irregular data. Prior to our work, a domain expert selects the…”
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Conference Proceeding -
17
MnnFast: A Fast and Scalable System Architecture for Memory-Augmented Neural Networks
ISSN: 2575-713XPublished: ACM 01.06.2019Published in 2019 ACM/IEEE 46th Annual International Symposium on Computer Architecture (ISCA) (01.06.2019)“…Memory-augmented neural networks are getting more attention from many researchers as they can make an inference with the previous history stored in memory…”
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Conference Proceeding -
18
SpV8: Pursuing Optimal Vectorization and Regular Computation Pattern in SpMV
Published: IEEE 05.12.2021Published in 2021 58th ACM/IEEE Design Automation Conference (DAC) (05.12.2021)“…Sparse Matrix-Vector Multiplication (SpMV) plays an important role in many scientific and industry applications, and remains a well-known challenge due to the…”
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Conference Proceeding -
19
TSUNAMI: A GPU Implementation of the WFA Algorithm
Published: IEEE 21.10.2023Published in 2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT) (21.10.2023)“…Pairwise sequence alignment represents a fundamental step in the genome assembly pipeline, being the most time-consuming step and the bottleneck factor in…”
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Conference Proceeding -
20
Improving Throughput-Oriented LLM Inference with CPU Computations
Published: ACM 13.10.2024Published in 2024 33rd International Conference on Parallel Architectures and Compilation Techniques (PACT) (13.10.2024)“…Large language models (LLMs) have recently captured the attention of a broad audience. To a large part, their exceptional performance in text generation was…”
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Conference Proceeding