Search Results - "Computer systems organization Architectures Other architectures Reconfigurable computing"
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DRISA: a DRAM-based Reconfigurable In-Situ Accelerator
ISBN: 1450349528, 9781450349529ISSN: 2379-3155Published: New York, NY, USA ACM 14.10.2017Published in MICRO-50 : the 50th annual IEEE/ACM International Symposium on Microarchitecture : proceedings : October 14-18, 2017, Cambridge, MA (14.10.2017)“…Data movement between the processing units and the memory in traditional von Neumann architecture is creating the "memory wall" problem. To bridge the gap, two…”
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Maximizing CNN accelerator efficiency through resource partitioning
Published: ACM 01.06.2017Published in 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA) (01.06.2017)“…Convolutional neural networks (CNNs) are revolutionizing machine learning, but they present significant computational challenges. Recently, many FPGA-based…”
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Stream-dataflow acceleration
Published: ACM 01.06.2017Published in 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA) (01.06.2017)“…Demand for low-power data processing hardware continues to rise inexorably. Existing programmable and "general purpose" solutions (eg. SIMD, GPGPUs) are…”
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Understanding and optimizing asynchronous low-precision stochastic gradient descent
Published: ACM 01.06.2017Published in 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA) (01.06.2017)“…Stochastic gradient descent (SGD) is one of the most popular numerical algorithms used in machine learning and other domains. Since this is likely to continue…”
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Qubit Mapping for Reconfigurable Atom Arrays
ISSN: 1558-2434Published: ACM 29.10.2022Published in 2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD) (29.10.2022)“…Because of the largest number of qubits available, and the massive parallel execution of entangling two-qubit gates, atom arrays is a promising platform for…”
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Caffeine: Towards uniformed representation and acceleration for deep convolutional neural networks
ISSN: 1558-2434Published: ACM 01.11.2016Published in Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design (01.11.2016)“…With the recent advancement of multilayer convolutional neural networks (CNN), deep learning has achieved amazing success in many areas, especially in visual…”
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SODA: Stencil with Optimized Dataflow Architecture
ISSN: 1558-2434Published: ACM 01.11.2018Published in 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (01.11.2018)“…Stencil computation is one of the most important kernels in many application domains such as image processing, solving partial differential equations, and…”
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TGPA: Tile-Grained Pipeline Architecture for Low Latency CNN Inference
ISSN: 1558-2434Published: ACM 01.11.2018Published in 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (01.11.2018)“…FPGAs are more and more widely used as reconfigurable hardware accelerators for applications leveraging convolutional neural networks (CNNs) in recent years…”
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MECLA: Memory-Compute-Efficient LLM Accelerator with Scaling Sub-matrix Partition
Published: IEEE 29.06.2024Published in 2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA) (29.06.2024)“…Large language models (LLMs) have been showing surprising performance in processing language tasks, bringing a new prevalence to deploy LLM from cloud to edge…”
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Hardware-Aware Machine Learning: Modeling and Optimization
ISSN: 1558-2434Published: ACM 01.11.2018Published in 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) (01.11.2018)“…Recent breakthroughs in Machine Learning (ML) applications, and especially in Deep Learning (DL), have made DL models a key component in almost every modern…”
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Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs
Published: IEEE 09.07.2023Published in 2023 60th ACM/IEEE Design Automation Conference (DAC) (09.07.2023)“…Heterogeneous MPSoCs comprise diverse processing units of varying compute capabilities. To date, the mapping strategies of neural networks (NNs) onto such…”
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A Memory-Efficient LLM Accelerator with Q-K Correlation Prediction using Cluster-Based Associative Array for Selective KV Accessing
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…Attention-based LLMs excel in text generation but face redundant computations in autoregressive token generation. While KV cache mitigates this, it introduces…”
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Supporting Register-based Addressing Modes for in-DRAM PIM ISAs
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…Processing-in-Memory architecture presents a promising solution to alleviate the data movement bottleneck that arises from transferring data between memory and…”
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ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…Modern data-driven applications expose limitations of von Neumann architectures-extensive data movement, low throughput, and poor energy efficiency…”
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HH-PIM: Dynamic Optimization of Power and Performance with Heterogeneous-Hybrid PIM for Edge AI Devices
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…Processing-in-Memory (PIM) architectures offer promising solutions for efficiently handling AI applications in energy-constrained edge environments. While…”
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RADiT: Redundancy-Aware Diffusion Transformer Acceleration Leveraging Timestep Similarity
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…Diffusion Transformers (DiTs) have demonstrated unprecedented performance across various generative tasks including image and video generation. However, a…”
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Late Breaking Results: FPGen-3D: Automated Framework for 3D-FPGA Architecture Generation and Exploration
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…In this work, we propose FPGen-3D, an automated framework for 3D field-programmable gate arrays (FPGA) architecture generation and exploration. FPGen-3D…”
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Configurable DSP-Based CAM Architecture for Data-Intensive Applications on FPGAs
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…Content-addressable memory (CAM) is a type of fast memory unique in its ability to perform parallel searches of stored data based on content rather than…”
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VersaSlot: Efficient Fine-grained FPGA Sharing with Big.Little Slots and Live Migration in FPGA Cluster
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…As FPGAs gain popularity for on-demand application acceleration in data center computing, dynamic partial reconfiguration (DPR) has become an effective…”
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MambaOPU: An FPGA Overlay Processor for State-space-duality-based Mamba Models
Published: IEEE 22.06.2025Published in 2025 62nd ACM/IEEE Design Automation Conference (DAC) (22.06.2025)“…State-space models (SSMs), such as Mamba, have emerged as a promising alternative to Transformers. However, the recently developed Mamba2, based on state space…”
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