Výsledky vyhľadávania - "Computer Principles and Design in Verilog HDL"

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  1. 1

    A Brief Introduction to Logic Circuits and Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…Logic circuit design is the foundation of computer design. This chapter briefly introduces the basic concept of the logic circuits and Verilog HDL, a language…”
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  2. 2

    Instruction Set Architecture and ALU Design Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter introduces the instruction set architecture (ISA), some microprocessor without interlocked pipeline stages (MIPS) instructions, an assembler and…”
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  3. 3

    Exceptions and Interrupts Handling and Design in Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter first introduces the general mechanism for dealing with the exceptions and interrupts, including how to detect an exception and an interrupt, how…”
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  4. 4

    Design of Pipelined CPU with Caches and TLBs in Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter first describes how to use cache and translation lookaside buffer (TLB) with the integer unit (IU), floating‐point unit (FPU), and main memory…”
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  5. 5

    Multithreading CPU and Multicore CPU Design in Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter discusses the design issues of multithreading and multicore central processing units (CPUs), and gives two simple design examples: one for a…”
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  6. 6

    Computer Fundamentals and Performance Evaluation Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter introduces some basic concepts, the organization of modern computers, and the evaluation method of computer performance. It first introduces the…”
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  7. 7

    High-Performance Computers and Interconnection Networks Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…A high‐performance computer system consists of a set of compute nodes as well as an interconnection network that connects the nodes in the systems. This…”
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  8. 8

    Computer Arithmetic Algorithms and Implementations Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter first introduces two types of the binary representations: unsigned number (absolute) and 2's complement representation for signed integers. It…”
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  9. 9

    Design of Pipelined CPU with Precise Interrupt in Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter describes how to design a pipelined CPU in which a delayed branch technique is used to solve the control hazard problems; an internal forwarding…”
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  10. 10

    Floating-Point Algorithms and FPU Design in Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…In the modern CPUs, there is a floating‐point unit which can operate on floating‐point numbers. The IEEE 754 Standard defines mainly two floating‐point…”
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  11. 11

    Multiple-Cycle CPU Design in Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter describes a method for designing a multiple‐cycle (MC) CPU which uses less time to execute simple instructions. The key design point of the MC CPU…”
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  12. 12

    Input/Output Interface Controller Design in Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter first introduces the basic technologies related to input/output (I/O) interface design, and describes the methods of data error detection and…”
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  13. 13

    Memory Hierarchy and Virtual Memory Management Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…Memory is a temporary place for storing programs. It is commonly implemented with dynamic random access memory (DRAM). This chapter describes the memory…”
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  14. 14

    Design of Pipelined CPU with FPU in Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…This chapter describes the design of a pipelined CPU which has a floating‐point unit (FPU). The instructions executed by the FPU include float addition,…”
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  15. 15

    Single-Cycle CPU Design in Verilog HDL Autor Li, Yamin, Tsinghua University Press

    ISBN: 1118841093, 9781118841099
    Vydavateľské údaje: Singapore Wiley 2015
    “…A single'\cycle CPU executes each instruction in one clock cycle. This chapter describes the design method of the single'\cycle CPU and gives the Verilog HDL…”
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  16. 16

    Brief Contents Autor Li, Yamin, Tsinghua University Press

    ISBN: 9781118841099, 1118841093
    Vydavateľské údaje: Singapore John Wiley & Sons, Incorporated 2015
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  17. 17

    EULA Autor Li, Yamin, Tsinghua University Press

    ISBN: 9781118841099, 1118841093
    Vydavateľské údaje: Singapore Wiley 2015
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  18. 18

    Brief Contents Autor Li, Yamin, Tsinghua University Press

    ISBN: 9781118841099, 1118841093
    Vydavateľské údaje: Singapore Wiley 2015
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  19. 19

    EULA Autor Li, Yamin, Tsinghua University Press

    ISBN: 9781118841099, 1118841093
    Vydavateľské údaje: Singapore John Wiley & Sons, Incorporated 2015
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