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  1. 1

    Efficient multiple-bit retention register assignment for power gated design: concept and algorithms by Chen, Yu-Guang, Shi, Yiyu, Lai, Kuan-Yu, Hui, Geng, Chang, Shih-Chieh

    ISBN: 9781450315739, 1450315739
    ISSN: 1092-3152
    Published: New York, NY, USA ACM 05.11.2012
    “…Retention registers have been widely used in power gated design to store data during sleep mode. Since they consume much larger area and power than normal…”
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    Conference Proceeding
  2. 2

    Multiple tunable constant multiplications: algorithms and applications by Aksoy, Levent, Costa, Eduardo, Flores, Paulo, Monteiro, José

    ISBN: 9781450315739, 1450315739
    ISSN: 1092-3152
    Published: New York, NY, USA ACM 05.11.2012
    “… for the multiplication of multiple constants by an input variable, has been the subject of great interest since the complexity of many digital signal processing (DSP…”
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    Conference Proceeding
  3. 3

    Defect tolerant probabilistic design paradigm for nanotechnologies by Jacome, Margarida, He, Chen, de Veciana, Gustavo, Bijansky, Stephen

    ISBN: 1581138288, 9781581138283, 1511838288
    ISSN: 0738-100X
    Published: New York, NY, USA ACM 07.06.2004
    “…Recent successes in the development and self-assembly of nanoelectronic devices suggest that the ability to manufacture dense nanofabrics is on the near…”
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    Conference Proceeding
  4. 4

    A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs by Singh, Amit Kumar, Kumar, Akash, Srikanthan, Thambipillai

    ISBN: 9781450307130, 1450307132
    Published: New York, NY, USA ACM 09.10.2011
    “…Modern embedded systems are based on Multiprocessor-Systems-on-Chip (MPSoCs) to meet the strict timing deadlines of multiple applications. MPSoC resources must…”
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    Conference Proceeding
  5. 5

    A Novel Entropy Production Based Full-Chip TSV Fatigue Analysis by Wang, Tianchen, Samal, Sandeep Kumar, Lim, Sung Kyu, Shi, Yiyu

    ISBN: 1467383899, 9781467383899
    Published: Piscataway, NJ, USA IEEE Press 02.11.2015
    “…Through-silicon vias (TSVs) are subject to thermal fatigue due to stress over time, no matter how small the stress…”
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    Conference Proceeding
  6. 6

    Communication Scheduling and Buslet Synthesis for Low-Interconnect HLS Designs by Tartaglione, Enzo, Dutt, Shantanu

    ISBN: 1467383899, 9781467383899
    Published: Piscataway, NJ, USA IEEE Press 02.11.2015
    “…Current nanoscale designs are highly interconnect dominated, taking about 70% of the chip area. Interconnects also consume significant dynamic power, and about…”
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    Conference Proceeding
  7. 7

    Joint design-time and post-silicon optimization for digitally tuned analog circuits by Wei Yao, Yiyu Shi, Lei He, Pamarti, S.

    ISSN: 1092-3152
    Published: IEEE 01.11.2009
    “… In this paper we formulate the co-optimization problem for digitally tuned analog circuits to optimize the parametric yield, subject to power and area constraints…”
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  8. 8

    Performance-impact limited area fill synthesis by Chen, Yu, Gupta, Puneet, Kahng, Andrew B.

    ISBN: 1581136889, 9781581136883
    Published: New York, NY, USA ACM 02.06.2003
    “…Chemical-mechanical planarization (CMP) and other manufacturing steps in very deep-submicron VLSI have varying effects on device and interconnect features,…”
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    Conference Proceeding
  9. 9

    Tutorial: reading and reviewing the common schema for electrical design and analysis by Parks, C. H.

    ISBN: 9780818607813, 0818607815
    ISSN: 0738-100X
    Published: New York, NY, USA ACM 01.10.1987
    Published in 24th ACM/IEEE Design Automation Conference (01.10.1987)
    “… Reviews are now required for consensus by technical experts who are also familiar with this subject matter…”
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    Conference Proceeding
  10. 10

    Advantages of the activity scanning approach in the modeling of complex construction processes by Martinez, Julio C., Ioannou, Photios G.

    ISBN: 0780330188, 9780780330184
    Published: Washington, DC, USA IEEE Computer Society 01.12.1995
    “…Construction processes are very complex and include highly interdependent components subject to complex activity startup conditions…”
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    Conference Proceeding
  11. 11

    On modeling integrated design environments by Hübel, Christoph, Ruland, Detlev, Siepmann, Ernst

    ISBN: 0818627808, 9780818627804
    Published: Los Alamitos, CA, USA IEEE Computer Society Press 1992
    “…) design subject model. The design structure model is introduced for modeling on a higher level of abstraction exactly those aspects of design objects which are necessary for design methodology management. The applied concept is called design object abstraction…”
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    Conference Proceeding Journal Article
  12. 12

    A contemporary perspective on design automation and VLSI in the 80's (Position Statement) by Allen, Jonathan

    ISBN: 9780897910200, 0897910206
    Published: New York, NY, USA ACM 23.06.1980
    “…The goal of design automation for VLSI is to provide tools which permit rapid, correct, and economical design of custom circuits subject to constraints of area, time, or power…”
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    Conference Proceeding
  13. 13

    Design automation at a large architect-engineer by Chelotti, E. F., Bossie, D. P.

    ISBN: 9780897910200, 0897910206
    Published: New York, NY, USA ACM 23.06.1980
    “… This progress has been matched by acceptance, and at G & H DA is considered a normal and viable mode of operation rather than an alternate method subject to doubts by management, clients, and personnel…”
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  14. 14

    Studying the mouse for CAD systems by Price, Lynne A.

    ISBN: 0818605421, 9780818605420
    Published: Piscataway, NJ, USA IEEE Press 25.06.1984
    “… Although subjects did prefer some styles of interaction over others, quantitative measures…”
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