Výsledky vyhledávání - "Algorithm-based verification"

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  1. 1

    LDAVPM: A Latch Design and Algorithm-Based Verification Protected Against Multiple-Node-Upsets in Harsh Radiation Environments Autor Yan, Aibin, Li, Zhixing, Cui, Jie, Huang, Zhengfeng, Ni, Tianming, Girard, Patrick, Wen, Xiaoqing

    ISSN: 0278-0070, 1937-4151
    Vydáno: New York IEEE 01.06.2023
    “…In deep nano-scale and high-integration CMOS technologies, storage circuits have become increasingly sensitive to charge-sharing-induced multiple-node-upsets…”
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  2. 2

    QtNURAV: A Robust Latch Design with Quintuple Node Upset Recovery and Algorithm based Verifications for Aerospace Applications Autor Yan, Aibin, Li, Jing, Bao, Han, Ni, Tianming, Huang, Zhengfeng, Liang, Bin, Girard, Patrick, Wen, Xiaoqing

    ISSN: 0018-9251, 1557-9603
    Vydáno: IEEE 2025
    “…With the continuous scaling of transistor feature sizes to the deep nano-scale, modern circuits have become increasingly sensitive to radiation-induced soft…”
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  3. 3

    Cost-Optimized Double-Node-Upset-Recovery Latch Designs With Aging Mitigation and Algorithm-Based Verification for Long-Term Robustness Enhancement Autor Yan, Aibin, Hu, Changli, Li, Jing, Bai, Na, Huang, Zhengfeng, Ni, Tianming, Patrick, Girard, Wen, Xiaoqing

    ISSN: 1063-8210, 1557-9999
    Vydáno: New York IEEE 01.06.2025
    “…With the continuous advancement of CMOS technologies, soft errors, such as single-node upset (SNU) and double-node upset (DNU), caused by radiation in…”
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  4. 4

    HALTRAV: Design of a High-Performance and Area-Efficient Latch With Triple-Node-Upset Recovery and Algorithm-Based Verifications Autor Guo, Xing, Zhang, Jiajia, Meng, Xu, Li, Zhenmin, Wen, Xiaoqing, Girard, Patrick, Liang, Bin, Yan, Aibin

    ISSN: 0278-0070, 1937-4151
    Vydáno: New York IEEE 01.06.2025
    “…With the rapid advancement of semiconductor technologies, latches become increasingly sensitive to soft errors, especially triple node upsets (TNUs), in harsh…”
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  5. 5

    A High-Performance Quadruple-Node-Upset-Tolerant Latch Design and an Algorithm for Tolerance Verification of Hardened Latches Autor Xu, Hui, Qin, Xuewei, Ma, Ruijun, Liu, Chaoming, Zhu, Shuo, Wang, Jun, Liang, Huaguo

    ISSN: 0923-8174, 1573-0727
    Vydáno: New York Springer US 01.02.2024
    Vydáno v Journal of electronic testing (01.02.2024)
    “…With the development of semiconductor technology, the shrinking of feature size in integrated circuits has made them more sensitive to multiple-node-upsets…”
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  6. 6

    The Importance of Assuring Algorithm-based Verification Agents Autor Haugen, Odd Ivar

    ISSN: 2261-236X, 2274-7214, 2261-236X
    Vydáno: Les Ulis EDP Sciences 2019
    Vydáno v MATEC web of conferences (2019)
    “…Safety verification is about creating trust and building confidence that a system is safe and conforms to the specified requirements. The term confidence means…”
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