Výsledky vyhľadávania - "Algorithm/architecture co-design"

Speed/Area-Efficient ECC Processor Implementation Over GF(2 ^m) on FPGA via Novel Algorithm-Architecture Co-Design Autor Zeghid, Medien, Ahmed, Hassan Yousif, Chehri, Abdellah, Sghaier, Anissa

“…) has gradually become obsolete, leading to the implementation of PM with large field sizes. From this perspective, in this article, through a novel algorithm-architecture co…”
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Communication Algorithm-Architecture Co-Design for Distributed Deep Learning Autor Huang, Jiayi, Majumder, Pritam, Kim, Sungkeun, Muzahid, Abdullah, Yum, Ki Hwan, Kim, Eun Jung

“… In this work, we identify the inefficiency in widely used all-reduce algorithms, and the opportunity of algorithm-architecture co-design…”
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High-Radix/Mixed-Radix NTT Multiplication Algorithm/Architecture Co-Design Over Fermat Modulus Autor Xing, Yile, Li, Guangyan, Ye, Zewen, Luk, Ryan W. L., Chen, Donglong, Yan, Hong, Cheung, Ray C. C.

“…Polynomial multiplication using Number Theoretic Transform (NTT) is crucial in lattice-based post-quantum cryptography (PQC) and fully homomorphic encryption…”
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DDC-PIM: Efficient Algorithm/Architecture Co-Design for Doubling Data Capacity of SRAM-Based Processing-in-Memory Autor Duan, Cenlin, Yang, Jianlei, He, Xiaolin, Qi, Yingjie, Wang, Yikun, Wang, Yiou, He, Ziyan, Yan, Bonan, Wang, Xueyan, Jia, Xiaotao, Pan, Weitao, Zhao, Weisheng

“… algorithm/architecture co-design methodology that effectively doubles the equivalent data capacity…”
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Invited: Accelerating Genome Analysis via Algorithm-Architecture Co-Design Autor Mutlu, Onur, Firtina, Can

“… To address these challenges, several algorithm-architecture co-design works have been proposed, targeting different steps of the genome analysis pipeline…”
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Efficient Realization of Householder Transform Through Algorithm-Architecture Co-Design for Acceleration of QR Factorization Autor Merchant, Farhad, Vatwani, Tarun, Chattopadhyay, Anupam, Raha, Soumyendu, Nandy, S. K., Narayan, Ranjani

“… In this paper, we present efficient realization of Householder Transform (HT) based QR factorization through algorithm-architecture co-design where we achieve performance…”
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Impala: Algorithm/Architecture Co-Design for In-Memory Multi-Stride Pattern Matching Autor Sadredini, Elaheh, Rahimi, Reza, Lenjani, Marzieh, Stan, Mircea, Skadron, Kevin

“…High-throughput and concurrent processing of thousands of patterns on each byte of an input stream is critical for many applications with real-time processing…”
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A Systematic Approach for Acceleration of Matrix-Vector Operations in CGRA through Algorithm-Architecture Co-Design Autor Merchant, Farhad, Vatwani, Tarun, Chattopadhyay, Anupam, Raha, Soumyendu, Nandy, S K, Narayan, Ranjani, Leupers, Rainer

“…). In this paper, we present a systematic methodology of algorithm-architecture co-design to accelerate matrix-vector operations where we emphasize on the matrix-vector multiplication (gemv…”
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An Algorithm Architecture Co-Design for CMOS Compressive High Dynamic Range Imaging Autor Guicquero, William, Dupret, Antoine, Vandergheynst, Pierre

“…Standard image sensors feature dynamic range about 60 to 70 dB while the light flux of natural scenes may be over 120 dB. Most imagers dedicated to address…”
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SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning Autor Wang, Hanrui, Zhang, Zhekai, Han, Song

“… In this paper, we present SpAtten, an efficient algorithm-architecture co-design that leverages token sparsity, head sparsity, and quantization opportunities to reduce the attention computation and memory access…”
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Ultra Low Power Sensor Node for Security Applications, Facilitated by Algorithm-Architecture Co-design Autor Sharma, Saransh, Mukherjee, Avilash, Dongre, Abhishek, Sharad, Mrigank

“…Design of an ultra-low power sensor node for identifying human trespassing is proposed, that can be attractive for security applications. Approximate Frequency…”
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Achieving Efficient QR Factorization by Algorithm-Architecture Co-design of Householder Transformation Autor Merchant, Farhad, Vatwani, Tarun, Chattopadhyay, Anupam, Raha, Soumyendu, Nandy, S. K., Narayan, Ranjani

“… Finally, we show that algorithm-architecture co-design leads to the most efficient realization of HT…”
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Reconfigurable Architecture for Deinterlacer based on Algorithm/Architecture Co-Design Autor Lee, Gwo Giun, Wang, Ming-Jiun, Chen, Bo-Han, Chen, JiunFu, Jao, Ping-Keng, Hsiao, Ching Jui, Wei, Ling-Fei

“… The content-adaptability of algorithm and the reconfiguration of architecture are concurrently explored by algorithm/architecture co-design methodology and Caltrop actor language (CAL…”
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Algorithm/Architecture Co-Design of 3-D Spatio-Temporal Motion Estimation for Video Coding Autor GWO GIUN LEE, WANG, Ming-Jiun, LIN, He-Yuan, SU, Drew Wei-Chi, LIN, Bo-Yun

“…This paper presents a new spatio-temporal motion estimation algorithm and its VLSI architecture for video coding based on algorithm and architecture co-design…”
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Accelerating LLM Inference via Low-Bit Fine-Grained Quantization Algorithm and Bit-Level Accelerator Co-Design Autor Xie, Xilong, Wang, Liang, Xiao, Limin, Ruan, Li, Zhang, Tairan, Wang, Jinquan, Wang, Yongyue, Liao, Xiaojian

“…Large language models (LLMs) have emerged as one of the most impactful and transformative paradigms in natural language processing. Despite their remarkable…”
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Triangle Counting Accelerations: From Algorithm to In-Memory Computing Architecture Autor Wang, Xueyan, Yang, Jianlei, Zhao, Yinglin, Jia, Xiaotao, Yin, Rong, Chen, Xuhang, Qu, Gang, Zhao, Weisheng

“…Triangles are the basic substructure of networks and triangle counting (TC) has been a fundamental graph computing problem in numerous fields such as social…”
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Efficient SRAM-PIM Co-design by Joint Exploration of Value-Level and Bit-Level Sparsity Autor Duan, Cenlin, Yang, Jianlei, Wang, Yikun, Wang, Yiou, Qi, Yingjie, He, Xiaolin, Yan, Bonan, Wang, Xueyan, Jia, Xiaotao, Zhao, Weisheng

“… To overcome these limitations, we present Dyadic Block PIM (DB-PIM), a groundbreaking algorithm-architecture co-design framework to harness both value-level and bit-level sparsity…”
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ARK: Fully Homomorphic Encryption Accelerator with Runtime Data Generation and Inter-Operation Key Reuse Autor Kim, Jongmin, Lee, Gwangho, Kim, Sangpyo, Sohn, Gina, Rhu, Minsoo, Kim, John, Ahn, Jung Ho

“… ARK enables practical FHE workloads with a novel algorithm-architecture co-design to accelerate…”
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AToM: Adaptive Token Merging for Efficient Acceleration of Vision Transformer Autor Shin, Jaekang, Kang, Myeonggu, Han, Yunki, Park, Junyoung, Kim, Lee-Sup

“… To overcome these issues, this paper introduces Adaptive Token Merging (AToM), a comprehensive algorithm-architecture co-design for accelerating ViTs…”
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A Sparsity-Aware Autonomous Path Planning Accelerator with Algorithm-Architecture Co-Design Autor Zhang, Yanjun, Niu, Xiaoyu, Zhang, Yifan, Tian, Hongzheng, Yu, Bo, Liu, Shaoshan, Huang, Sitao

“…Path planning is a critical task in autonomous driving systems that is most susceptible to real-time constraints but often demands computationally intensive…”
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