Search Results - "2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD)"

RT-NeRF: Real-Time On-Device Neural Radiance Fields Towards Immersive AR/VR Rendering by Li, Chaojian, Li, Sixu, Zhao, Yang, Zhu, Wenbo, Lin, Yingyan

“…Neural Radiance Field (NeRF) based rendering has attracted growing attention thanks to its state-of-the-art (SOTA) rendering quality and wide applications in…”
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Qubit Mapping for Reconfigurable Atom Arrays by Tan, Bochen, Bluvstein, Dolev, Lukin, Mikhail D., Cong, Jason

“…Because of the largest number of qubits available, and the massive parallel execution of entangling two-qubit gates, atom arrays is a promising platform for…”
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TorchQuantum Case Study for Robust Quantum Circuits (Invited Paper) by Wang, Hanrui, Liang, Zhiding, Gu, Jiaqi, Li, Zirui, Ding, Yongshan, Jiang, Weiwen, Shi, Yiyu, Pan, David Z., Chong, Frederic T., Han, Song

“…Quantum Computing has attracted much research attention because of its potential to achieve fundamental speed and efficiency improvements in various domains…”
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Why are Graph Neural Networks Effective for EDA Problems? by Ren, Haoxing, Nath, Siddhartha, Zhang, Yanqing, Chen, Hao, Liu, Mingjie

“…In this paper, we discuss the source of effectiveness of Graph Neural Networks (GNNs) in EDA, particularly in the VLSI design automation domain. We argue that…”
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An MLIR-based Compiler Flow for System-Level Design and Hardware Acceleration by Agostini, Nicolas Bohm, Curzel, Serena, Amatya, Vinay, Tan, Cheng, Minutoli, Marco, Castellana, Vito Giovanni, Manzano, Joseph, Kaeli, David, Tumeo, Antonino

“…The generation of custom hardware accelerators for applications implemented within high-level productive programming frameworks requires considerable manual…”
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Quantum Neural Network Compression by Hu, Zhirui, Dong, Peiyan, Wang, Zhepeng, Lin, Youzuo, Wang, Yanzhi, Jiang, Weiwen

“…Model compression, such as pruning and quantization, has been widely applied to optimize neural networks on resource-limited classical devices. Recently, there…”
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Superfast Full-Scale GPU-Accelerated Global Routing by Lin, Shiju, Wong, Martin D.F.

“…Global routing is an essential step in physical design. Recently there are works on accelerating global routers using GPU. However, they only focus on certain…”
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How Good Is Your Verilog RTL Code? A Quick Answer from Machine Learning by Sengupta, Prianka, Tyagi, Aakash, Chen, Yiran, Hu, Jiang

“…Hardware Description Language (HDL) is a common entry point for designing digital circuits. Differences in HDL coding styles and design choices may lead to…”
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Neurally-Inspired Hyperdimensional Classification for Efficient and Robust Biosignal Processing by Ni, Yang, Lesica, Nicholas, Zeng, Fan-Gang, Imani, Mohsen

“…The biosignals consist of several sensors that collect time series information. Since time series contain temporal dependencies, they are difficult to process…”
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Arjun: An Efficient Independent Support Computation Technique and its Applications to Counting and Sampling by Soos, Mate, Meel, Kuldeep S.

“…Given a Boolean formula φ over the set of variables X and a projection set \mathcal{P} \subseteq X, then if \mathcal{I} \subseteq \mathcal{P} is independent…”
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Approximate Computing and the Efficient Machine Learning Expedition by Henkel, Jorg, Li, Hai, Raghunathan, Anand, Tahoori, Mehdi B., Venkataramani, Swagath, Yang, Xiaoxuan, Zervakis, Georgios

“…Approximate computing (AxC) has been long accepted as a design alternative for efficient system implementation at the cost of relaxed accuracy requirements…”
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Polynomial Formal Verification: Ensuring Correctness under Resource Constraints : (Invited Paper) by Drechsler, Rolf, Mahzoon, Alireza

“…Recently, a lot of effort has been put into developing formal verification approaches by both academic and industrial research. In practice, these techniques…”
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DARL: Distributed Reconfigurable Accelerator for Hyperdimensional Reinforcement Learning by Chen, Hanning, Issa, Mariam, Ni, Yang, Imani, Mohsen

“…Reinforcement Learning (RL) is a powerful technology to solve decision-making problems such as robotics control. Modern RL algorithms, i.e., Deep Q-Learning,…”
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SpecPart: A Supervised Spectral Framework for Hypergraph Partitioning Solution Improvement by Bustany, Ismail, Kahng, Andrew B., Koutis, Ioannis, Pramanik, Bodhisatta, Wang, Zhiang

“…State-of-the-art hypergraph partitioners follow the multilevel paradigm that constructs multiple levels of progressively coarser hypergraphs that are used to…”
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Pin Accessibility and Routing Congestion Aware DRC Hotspot Prediction using Graph Neural Network and U-Net by Baek, Kyeonghyeon, Park, Hyunbum, Kim, Suwan, Choi, Kyumyung, Kim, Taewhan

“…An accurate DRC (design rule check) hotspot prediction at the placement stage is essential in order to reduce a substantial amount of design time required for…”
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GIA: A Reusable General Interposer Architecture for Agile Chiplet Integration by Li, Fuping, Wang, Ying, Cheng, Yuanqing, Wang, Yujie, Han, Yinhe, Li, Huawei, Li, Xiaowei

“…2.5D chiplet technology is gaining popularity for the efficiency of integrating multiple heterogeneous dies or chiplets on interposers, and it is also considered…”
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Reinforcement Learning and DEAR Framework for Solving the Qubit Mapping Problem by Huang, Ching-Yao, Lien, Chi-Hsiang, Mak, Wai-Kei

“…Quantum computing is gaining more and more attention due to its huge potential and the constant progress in quantum computer development. IBM and Google have…”
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COSIME: FeFET based Associative Memory for In-Memory Cosine Similarity Search by Liu, Che-Kai, Chen, Haobang, Imani, Mohsen, Ni, Kai, Kazemi, Arman, Laguna, Ann Franchesca, Niemier, Michael, Hu, Xiaobo Sharon, Zhao, Liang, Zhuo, Cheng, Yin, Xunzhao

“…In a number of machine learning models, an input query is searched across the trained class vectors to find the closest feature class vector in cosine…”
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Evaluating the Security of eFPGA-based Redaction Algorithms by Rezaei, Amin, Afsharmazayejani, Raheel, Maynard, Jordan

“…Hardware IP owners must envision procedures to avoid piracy and overproduction of their designs under a fabless paradigm. A newly proposed technique to…”
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Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters by Cavalcante, Matheus, Wuthrich, Domenic, Perotti, Matteo, Riedel, Samuel, Benini, Luca

“…While parallel architectures based on clusters of Processing Elements (PEs) sharing L1 memory are widespread, there is no consensus on how lean their PE should…”
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