Search Results - "[INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic"

Improved Error Bounds for Inner Products in Floating-Point Arithmetic by Jeannerod, Claude-Pierre, Rump, Siegfried M.

“…Given two floating-point vectors $x,y$ of dimension $n$ and assuming rounding to nearest, we show that if no underflow or overflow occurs, any evaluation order…”
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High Throughput/Gate AES Hardware Architectures Based on Datapath Compression by Ueno, Rei, Homma, Naofumi, Morioka, Sumio, Miura, Noriyuki, Matsuda, Kohei, Nagata, Makoto, Bhasin, Shivam, Mathieu, Yves, Graba, Tarik, Danger, Jean-Luc

“…This article proposes highly efficient Advanced Encryption Standard (AES) hardware architectures that support encryption and both encryption and decryption…”
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Memristive Computational Memory Using Memristor Overwrite Logic (MOL) by Alhaj Ali, Khaled, Rizk, Mostafa, Baghdadi, Amer, Diguet, Jean-Philippe, Jomaah, Jalal, Onizawa, Naoya, Hanyu, Takahiro

“…In this article, we present a novel logic design style, namely, memristor overwrite logic (MOL), associated with an original MOL-based computational memory…”
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Fast Modular Arithmetic on the Kalray MPPA-256 Processor for an Energy-Efficient Implementation of ECM by Ishii, Masahiro, Detrey, Jeremie, Gaudry, Pierrick, Inomata, Atsuo, Fujikawa, Kazutoshi

“…The Kalray MPPA-256 processor is based on a recent low-energy manycore architecture. In this article, we investigate its performance in multiprecision…”
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Improved Backward Error Bounds for LU and Cholesky Factorizations by Rump, Siegfried M., Jeannerod, Claude-Pierre

“…Assuming standard floating-point arithmetic (in base $\beta$, precision $p$) and barring underflow and overflow, classical rounding error analysis of the LU or…”
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Networked Power-Gated MRAMs for Memory-Based Computing by Diguet, Jean-Philippe, Onizawa, Naoya, Rizk, Mostafa, Sepulveda, Johanna, Baghdadi, Amer, Hanyu, Takahiro

“…Emerging nonvolatile memory technologies open new perspectives for original computing architectures. In this paper, we propose a new type of flexible and…”
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Improved error bounds for floating-point products and Horner’s scheme by Florian Bünger, Siegfried M. Rump, Claude-Pierre Jeannerod

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Towards FHE in Embedded Systems: A Preliminary Codesign Space Exploration of a HW/SW Very Large Multiplier by Ghada, Abozaid, Tisserand, Arnaud, Ahmed, El-Mahdy, Yasutaka, Wada

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Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology by Danger, Jean-Luc, Yashiro, Risa, Graba, Tarik, Mathieu, Yves, Si-Merabet, Abdelmalek, Sakiyama, Kazuo, Miura, Noriyuki, Nagata, Makoto

“…An SR-latch can be regarded as primitive to build a True Random Number Generation (TRNG) or Physically Unclonable Function (PUF). Indeed, when the SR inputs of…”
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Precision variable anonymization method supporting transprecision computing by Harada, Keiya, Charles, Henri-Pierre, Nishi, Hiroaki

“…Recently, the number of Internet of Things (IoT) sensors has been increasing rapidly; hence, various data are gathered. As a secondary use of the data, they…”
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