Výsledky vyhľadávania - algorithms and architectural for parallel processing

Scalable Parallel Processing: Architectural Models, Real-Time Programming, and Performance Evaluation Autor Mirela Sino, Ervin Domazet

“…This research paper analyzes and highlights the benefits of parallel processing to enhance performance and computational efficiency in modern computing systems…”
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Architectural Design Guidelines Based on Computer Core Evaluation and Processing Paradigms Autor Jose L. Reategui

“… Today, sequential processing (CPU) or parallel processing (GPU) works with architectural design in different ways, such as Graphical User Interfaces using CPU or ray-tracing rendering using GPU…”
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Implementing a Parallel Image Edge Detection Algorithm Based on the Otsu-Canny Operator on the Hadoop Platform Autor Tian, Yun, Wang, Min, Chen, Lichao, Cao, Jianfang

“… parallel programming model that runs on the Hadoop platform. The Otsu algorithm is used to optimize the Canny…”
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An architectural framework for accelerating dynamic parallel algorithms on reconfigurable hardware Autor Chen, Tao, Srinath, Shreesha, Batten, Christopher, Suh, G. Edward

“…In this paper, we propose ParallelXL, an architectural framework for building application-specific parallel accelerators with low manual effort…”
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A parallel approximate string matching under Levenshtein distance on graphics processing units using warp-shuffle operations Autor Ho, ThienLuan, Oh, Seung-Rohk, Kim, HyunJin

“… This paper proposes an efficient memory-access algorithm for parallel approximate string matching with k-differences on Graphics Processing Units (GPUs…”
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gpuRIR: A python library for room impulse response simulation with GPU acceleration Autor Diaz-Guerra, David, Miguel, Antonio, Beltran, Jose R.

“… In this paper, we present a new implementation that dramatically improves the computation speed of the ISM by using Graphic Processing Units (GPUs…”
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Hardware Implementations of Dehazing Algorithms Autor Akash, E, Ashokkumar, S R, Banupriya, N, Subash Thangam, K, Sanjay Kumar, N, Jananeshwaran, M

“… This review paper delves into the realm of dehazing algorithms, with a specific focus on their hardware implementations…”
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A Hybrid CPU/GPU Pattern-Matching Algorithm for Deep Packet Inspection Autor Lee, Chun-Liang, Lin, Yi-Shan, Chen, Yaw-Chung

“… Graphic processing units (GPUs) have superior parallel processing power, but transmission bottlenecks can reduce optimal GPU efficiency…”
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DT-GA-FLANN: Decision Tree-Based Genetically Optimized FLANN for Missing Value Imputation and Classification Autor Jena, Monalisa, Dehuri, Satchidananda, Cho, Sung-Bae

“… However, functional expansion in FLANN can increase architectural complexity, which is effectively mitigated using Genetic Algorithm (GA…”
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SCNTA: Monitoring of Network Availability and Activity for Identification of Anomalies Using Machine Learning Approaches Autor Rawat, Romil, Mahor, Vinod, Garg, Bhagwati, Telang, Shrikant, Pachlasiya, Kiran, Chouhan, Mukesh, Shukla, Surendra Kumar, Mishra, Rina

“…). Based on parallel processing along with well-defined interfacing of data, the modules are framed, allowing each module to be modified and upgraded separately…”
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A Fast CTU-level SAO Algorithm and Its Hardware Architecture for AVS3 Video Coding Autor Lin, Hao, Wen, Yingbo, Xiang, Guoqing, Qu, Xinyu, Zhang, Peng, Yan, Wei

“… To address this problem, a fast Coding Tree Unit (CTU)-level SAO algorithm and its hardware architecture is proposed…”
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Enhancing the performance of the aggregated bit vector algorithm in network packet classification using GPU Autor Abbasi, Mahdi, Tahouri, Razieh, Rafiee, Milad

“… through discriminating incoming traffic. Recently, graphics processing units (GPUs) have been exploited as efficient accelerators for parallel implementation of software classifiers…”
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A Heterogeneous Parallel LU Factorization Algorithm Based on a Basic Column Block Uniform Allocation Strategy Autor Wu, Rongteng, Xie, Xiaohong

“… We present a heterogeneous parallel LU factorization algorithm for heterogeneous architectures…”
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A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems Autor Mittal, Sparsh, Vetter, Jeffrey S.

“…As the number of cores on a chip increases and key applications become even more data-intensive, memory systems in modern processors have to deal with…”
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Parallel Processing of Sobel Edge Detection on FPGA: Enhancing Real-Time Image Analysis Autor Ravichandran, Sanmugasundaram, Su, Hui-Kai, Kuo, Wen-Kai, Dhanasekaran, Dileepan, Mahalingam, Manikandan, Yang, Jui-Pin

“… In this paper, the improved Sobel edge detection algorithm was implemented using Verilog as an FPGA-based algorithm designed to perform real-time image processing under the Sobel edge detection…”
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IOPA: I/O-aware parallelism adaption for parallel programs Autor Liu, Tao, Liu, Yi, Qian, Chen, Qian, Depei

“…With the development of multi-/many-core processors, applications need to be written as parallel programs to improve execution efficiency…”
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Enabling Highly Efficient Capsule Networks Processing Through A PIM-Based Architecture Design Autor Zhang, Xingyao, Song, Shuaiwen Leon, Xie, Chenhao, Wang, Jing, Zhang, Weigong, Fu, Xin

“…In recent years, the CNNs have achieved great successes in the image processing tasks, e.g…”
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Parallel imperialist competitive algorithms Autor Majd, Amin, Sahebi, Golnaz, Daneshtalab, Masoud, Plosila, Juha, Lotfi, Shahriar, Tenhunen, Hannu

“…; they are mostly sequential but some of them have parallel implementations as well. We propose a multi‐population method to parallelize the Imperialist Competitive Algorithm…”
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A coarse-grained parallelization of genetic algorithms Autor Rathomi, Muhamad Radzi, Pulungan, Reza

“… One solution to speed up the genetic algorithm processing is to use parallelization…”
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Parallel Branch-And-Bound Algorithms: Survey and Synthesis Autor Gendron, Bernard, Crainic, Teodor Gabriel

“…We present a detailed and up-to-date survey of the literature on parallel branch-and-bound algorithms…”
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