Search Results - Types and Design Styles – algorithm implementation in hardware

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  1. 1

    A hardware implementation of intelligent ECG classifier by Tran, Hoai Linh, Pham, Van Nam, Nguyen, Duc Thao

    ISSN: 0332-1649, 2054-5606
    Published: Bradford Emerald Group Publishing Limited 01.01.2015
    Published in Compel (01.01.2015)
    “…Purpose – The purpose of this paper is to design an intelligent ECG classifier using programmable IC technologies to implement many functional blocks of signal acquisition and processing in one compact device…”
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    Journal Article
  2. 2

    Embedded electronic circuits for cryptography, hardware security and true random number generation: an overview by Acosta, Antonio J., Addabbo, Tommaso, Tena‐Sánchez, Erica

    ISSN: 0098-9886, 1097-007X
    Published: Bognor Regis Wiley Subscription Services, Inc 01.02.2017
    “… In detail, we discuss the hardware implementation of the chief algorithms used in private…”
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    Journal Article
  3. 3

    Embedded Model Predictive Control for a Wearable Artificial Pancreas by Chakrabarty, Ankush, Healey, Elizabeth, Shi, Dawei, Zavitsanou, Stamatina, Doyle, Francis J., Dassau, Eyal

    ISSN: 1063-6536, 1558-0865
    Published: United States IEEE 01.11.2020
    “…), the design of convenient systems that optimize the user experience, especially for those with active lifestyles, such as children and adolescents, still remains an open research question…”
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    Journal Article
  4. 4

    Converting to and from Dilated Integers by Raman, R., Wise, D.S.

    ISSN: 0018-9340, 1557-9956
    Published: New York IEEE 01.04.2008
    Published in IEEE transactions on computers (01.04.2008)
    “… Efficient implementations of its operations can be found elsewhere. This paper offers efficient casting (type…”
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    Journal Article
  5. 5

    TCX: A Programmable Tensor Processor by Liang, Tailin, Wang, Lei, Shi, Shaobo, Glossner, John, Zhang, Xiaotong

    ISSN: 1558-1101
    Published: EDAA 14.03.2022
    “… It can be seamlessly integrated into existing RISC ISAs and provides software compatibility for scalable hardware implementations…”
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    Conference Proceeding
  6. 6

    Programming Languages and Systems: 31st European Symposium on Programming, ESOP 2022, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2022, Munich, Germany, April 2-7, 2022, Proceedings by European Symposium on Programming, Sergey, Ilya, European Conferences on Theory and Practice of Software

    ISBN: 9783030993368, 3030993361, 3030993353, 9783030993351
    Published: Cham Springer Nature 2022
    “… They deal with fundamental issues in the specification, design, analysis, and implementation of programming languages and systems…”
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    eBook Book
  7. 7

    Design and Implementation of Dance Motion Capture System Based on Deep Learning Algorithm by Wang, Xinxiu

    Published: IEEE 29.12.2023
    “… By optimizing the algorithm and hardware, we realized the real-time capture and analysis of different dance styles and action types, which provided…”
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    Conference Proceeding
  8. 8

    Fixed-outline floorplanning: enabling hierarchical design by Adya, S.N., Markov, I.L.

    ISSN: 1063-8210, 1557-9999
    Published: Piscataway, NJ IEEE 01.12.2003
    “…, with the sequence pair representation, the typical choice of moves is fairly straightforward. In this paper, we study the fixed-outline floorplan formulation that is more relevant to hierarchical design style and is justified for very large ASICs and SoCs…”
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    Journal Article
  9. 9

    Secure Systolic Montgomery Modular Multiplier Over Prime Fields Resilient to Fault-Injection Attacks by Yang, Qi, Hu, Xiaoting, Qin, Zhongping

    ISSN: 1063-8210, 1557-9999
    Published: IEEE 01.09.2015
    “… In our secure architectures, several computing types of systolic array structures are adopted to implement the MFMs, and two error-detecting styles based on linear arithmetic codes are employed to construct the EDMs…”
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    Journal Article
  10. 10

    Verification of hardware implementations through correctness of their recursive definitions in PVS by Alves Almeida, Ariane, Arias-Garcia, Janier, Llanos, Carlos H., Ayala-Rincon, Mauricio

    Published: IEEE 01.09.2014
    “…An approach is introduced to formally verify the logical correctness of reconfigurable hardware implementations of algebraic operators…”
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    Conference Proceeding
  11. 11

    Residue Number System (RNS) and Power Distribution Network Topology-Based Mitigation of Power Side-Channel Attacks by Selvam, Ravikumar, Tyagi, Akhilesh

    ISSN: 2410-387X, 2410-387X
    Published: Basel MDPI AG 01.03.2024
    Published in Cryptography (01.03.2024)
    “… These mitigation techniques are applicable at various design abstraction levels—algorithm, architecture, logic, physical, and gate levels…”
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    Journal Article
  12. 12

    The Impact of the Implementation Style on Power Consumption and Security in Embedded Cryptosystems by Yang, Z., Muresan, R.

    ISSN: 0840-7789
    Published: IEEE 01.05.2006
    “… of traces collected, the number of bits targeted by the correlation function, the implementation style, and the type…”
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    Conference Proceeding
  13. 13

    Overview of Dual rail with Precharge logic styles to thwart implementation-level attacks on hardware cryptoprocessors by Danger, J.-L., Guilley, S., Bhasin, S., Nassar, M.

    ISBN: 1424443970, 9781424443970
    Published: IEEE 01.11.2009
    “…The security of cryptographic implementations relies not only on the algorithm quality but also on the countermeasures to thwart attacks aiming at disclosing the secrecy…”
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    Conference Proceeding
  14. 14

    A Functional Approach to Hardware Software Co-Design by Aronsson, Markus

    ISBN: 9781085762915, 1085762912
    Published: ProQuest Dissertations & Theses 01.01.2018
    “… In this thesis we explore a functional approach to heterogeneous system development, with a staged hardware software co-design language embedded in Haskell, to address many of the modularity problems…”
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    Dissertation
  15. 15

    eFAirWrite: Bringing energy efficient text entry to next generation smart devices by Ghaffar, Muhammad Mohsin, Abdullah, Ahmad, Younas, Junaid, Rybalkin, Vladimir, Ney, Jonas, Lukowicz, Paul, Wehn, Norbert

    ISSN: 0957-4174
    Published: Elsevier Ltd 15.09.2025
    Published in Expert systems with applications (15.09.2025)
    “…) based algorithm called FAirWrite achieves state-of-the-art accuracy. However, this algorithm is optimized only for accuracy without considering the implementation constraints…”
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    Journal Article
  16. 16

    Systolic givens factorization of dense rectangular matrices by Cosnard, Michel, Robert, Yves

    ISSN: 0020-7160, 1029-0265
    Published: Abingdon Gordon and Breach Science Publishers 01.01.1988
    “… The pipelined version of the new algorithm leads to a systolic implementation whose area-time performances overcome those of the arrays of Bojanczyk, Brent and Kung [1…”
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    Journal Article
  17. 17

    Design and Implementation of an Optionally-Typed Functional Programming Language by Li, Patrick S

    ISBN: 9780355832099, 0355832097
    Published: ProQuest Dissertations & Theses 01.01.2017
    “…This thesis describes the motivation, design, and implementation of L.B. Stanza, an optionally-typed functional programming language aimed at helping…”
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    Dissertation
  18. 18

    Using ACL2 in the Design of Efficient, Verifiable Data Structures for High-Assurance Systems by Hardin, David, Slind, Konrad

    ISSN: 2075-2180, 2075-2180
    Published: Open Publishing Association 29.10.2018
    “… Autonomy algorithms, e.g., route planning, pattern matching, and inference, are based on complex data structures such as directed graphs and algebraic data types…”
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    Journal Article
  19. 19

    Using ACL2 in the Design of Efficient, Verifiable Data Structures for High-Assurance Systems by Hardin, David, Slind, Konrad

    ISSN: 2331-8422
    Published: Ithaca Cornell University Library, arXiv.org 10.10.2018
    Published in arXiv.org (10.10.2018)
    “… Autonomy algorithms, e.g., route planning, pattern matching, and inference, are based on complex data structures such as directed graphs and algebraic data types…”
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    Paper
  20. 20

    Magic: A VLSI layout system by Ousterhout, John K., Hamachi, Gordon T., Mayo, Robert N., Scott, Walter S., Taylor, George S.

    ISBN: 0818605421, 9780818605420
    Published: Piscataway, NJ, USA IEEE Press 25.06.1984
    “…Magic is a "smart" layout system for integrated circuits. The user interface is based on a new design style called logs, which combines the efficiency of mask-level design with the flexibility of symbolic design…”
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    Conference Proceeding