Search Results - Types and Design Styles – algorithm implementation in hardware
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A hardware implementation of intelligent ECG classifier
ISSN: 0332-1649, 2054-5606Published: Bradford Emerald Group Publishing Limited 01.01.2015Published in Compel (01.01.2015)“…Purpose – The purpose of this paper is to design an intelligent ECG classifier using programmable IC technologies to implement many functional blocks of signal acquisition and processing in one compact device…”
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Journal Article -
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Embedded electronic circuits for cryptography, hardware security and true random number generation: an overview
ISSN: 0098-9886, 1097-007XPublished: Bognor Regis Wiley Subscription Services, Inc 01.02.2017Published in International journal of circuit theory and applications (01.02.2017)“… In detail, we discuss the hardware implementation of the chief algorithms used in private…”
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Embedded Model Predictive Control for a Wearable Artificial Pancreas
ISSN: 1063-6536, 1558-0865Published: United States IEEE 01.11.2020Published in IEEE transactions on control systems technology (01.11.2020)“…), the design of convenient systems that optimize the user experience, especially for those with active lifestyles, such as children and adolescents, still remains an open research question…”
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Converting to and from Dilated Integers
ISSN: 0018-9340, 1557-9956Published: New York IEEE 01.04.2008Published in IEEE transactions on computers (01.04.2008)“… Efficient implementations of its operations can be found elsewhere. This paper offers efficient casting (type…”
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TCX: A Programmable Tensor Processor
ISSN: 1558-1101Published: EDAA 14.03.2022Published in Proceedings - Design, Automation, and Test in Europe Conference and Exhibition (14.03.2022)“… It can be seamlessly integrated into existing RISC ISAs and provides software compatibility for scalable hardware implementations…”
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Conference Proceeding -
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Programming Languages and Systems: 31st European Symposium on Programming, ESOP 2022, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2022, Munich, Germany, April 2-7, 2022, Proceedings
ISBN: 9783030993368, 3030993361, 3030993353, 9783030993351Published: Cham Springer Nature 2022“… They deal with fundamental issues in the specification, design, analysis, and implementation of programming languages and systems…”
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eBook Book -
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Design and Implementation of Dance Motion Capture System Based on Deep Learning Algorithm
Published: IEEE 29.12.2023Published in 2023 International Conference on Internet of Things, Robotics and Distributed Computing (ICIRDC) (29.12.2023)“… By optimizing the algorithm and hardware, we realized the real-time capture and analysis of different dance styles and action types, which provided…”
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Conference Proceeding -
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Fixed-outline floorplanning: enabling hierarchical design
ISSN: 1063-8210, 1557-9999Published: Piscataway, NJ IEEE 01.12.2003Published in IEEE transactions on very large scale integration (VLSI) systems (01.12.2003)“…, with the sequence pair representation, the typical choice of moves is fairly straightforward. In this paper, we study the fixed-outline floorplan formulation that is more relevant to hierarchical design style and is justified for very large ASICs and SoCs…”
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Journal Article -
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Secure Systolic Montgomery Modular Multiplier Over Prime Fields Resilient to Fault-Injection Attacks
ISSN: 1063-8210, 1557-9999Published: IEEE 01.09.2015Published in IEEE transactions on very large scale integration (VLSI) systems (01.09.2015)“… In our secure architectures, several computing types of systolic array structures are adopted to implement the MFMs, and two error-detecting styles based on linear arithmetic codes are employed to construct the EDMs…”
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Verification of hardware implementations through correctness of their recursive definitions in PVS
Published: IEEE 01.09.2014Published in 2014 27th Symposium on Integrated Circuits and Systems Design (SBCCI) (01.09.2014)“…An approach is introduced to formally verify the logical correctness of reconfigurable hardware implementations of algebraic operators…”
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Conference Proceeding -
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Residue Number System (RNS) and Power Distribution Network Topology-Based Mitigation of Power Side-Channel Attacks
ISSN: 2410-387X, 2410-387XPublished: Basel MDPI AG 01.03.2024Published in Cryptography (01.03.2024)“… These mitigation techniques are applicable at various design abstraction levels—algorithm, architecture, logic, physical, and gate levels…”
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The Impact of the Implementation Style on Power Consumption and Security in Embedded Cryptosystems
ISSN: 0840-7789Published: IEEE 01.05.2006Published in 2006 Canadian Conference on Electrical and Computer Engineering (01.05.2006)“… of traces collected, the number of bits targeted by the correlation function, the implementation style, and the type…”
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Conference Proceeding -
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Overview of Dual rail with Precharge logic styles to thwart implementation-level attacks on hardware cryptoprocessors
ISBN: 1424443970, 9781424443970Published: IEEE 01.11.2009Published in 2009 3rd International Conference on Signals, Circuits and Systems (01.11.2009)“…The security of cryptographic implementations relies not only on the algorithm quality but also on the countermeasures to thwart attacks aiming at disclosing the secrecy…”
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Conference Proceeding -
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A Functional Approach to Hardware Software Co-Design
ISBN: 9781085762915, 1085762912Published: ProQuest Dissertations & Theses 01.01.2018“… In this thesis we explore a functional approach to heterogeneous system development, with a staged hardware software co-design language embedded in Haskell, to address many of the modularity problems…”
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Dissertation -
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eFAirWrite: Bringing energy efficient text entry to next generation smart devices
ISSN: 0957-4174Published: Elsevier Ltd 15.09.2025Published in Expert systems with applications (15.09.2025)“…) based algorithm called FAirWrite achieves state-of-the-art accuracy. However, this algorithm is optimized only for accuracy without considering the implementation constraints…”
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Journal Article -
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Systolic givens factorization of dense rectangular matrices
ISSN: 0020-7160, 1029-0265Published: Abingdon Gordon and Breach Science Publishers 01.01.1988Published in International journal of computer mathematics (01.01.1988)“… The pipelined version of the new algorithm leads to a systolic implementation whose area-time performances overcome those of the arrays of Bojanczyk, Brent and Kung [1…”
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Journal Article -
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Design and Implementation of an Optionally-Typed Functional Programming Language
ISBN: 9780355832099, 0355832097Published: ProQuest Dissertations & Theses 01.01.2017“…This thesis describes the motivation, design, and implementation of L.B. Stanza, an optionally-typed functional programming language aimed at helping…”
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Dissertation -
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Using ACL2 in the Design of Efficient, Verifiable Data Structures for High-Assurance Systems
ISSN: 2075-2180, 2075-2180Published: Open Publishing Association 29.10.2018Published in Electronic proceedings in theoretical computer science (29.10.2018)“… Autonomy algorithms, e.g., route planning, pattern matching, and inference, are based on complex data structures such as directed graphs and algebraic data types…”
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Using ACL2 in the Design of Efficient, Verifiable Data Structures for High-Assurance Systems
ISSN: 2331-8422Published: Ithaca Cornell University Library, arXiv.org 10.10.2018Published in arXiv.org (10.10.2018)“… Autonomy algorithms, e.g., route planning, pattern matching, and inference, are based on complex data structures such as directed graphs and algebraic data types…”
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Paper -
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Magic: A VLSI layout system
ISBN: 0818605421, 9780818605420Published: Piscataway, NJ, USA IEEE Press 25.06.1984Published in Proceedings of the 21st Design Automation Conference (25.06.1984)“…Magic is a "smart" layout system for integrated circuits. The user interface is based on a new design style called logs, which combines the efficiency of mask-level design with the flexibility of symbolic design…”
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Conference Proceeding

