Search Results - Hardware Integrated circuits Logic circuits Sequential circuits

Parallel Dynamic Partitioning for Datapath Combinational Equivalence Checking by Zhou, Shuai, Zhang, Weikang, Zhang, Xindi, Jiang, Zite, You, Haihang, Cai, Shaowei

“…Combinational Equivalence Checking (CEC) is a crucial technique in electronic design automation for verifying the functional equivalence of combinational circuits…”
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PastATPG: A Hybrid ATPG Framework for Better Test Compaction with Partial Assignment SAT by Chao, Zhiteng, Zhang, Xindi, Zhang, Xinyu, Mu, Jianan, Liu, Zizhen, Liang, Shengwen, Cai, Shaowei, Ye, Jing, Li, Xiaowei, Li, Huawei

“… However, as the size and complexity of circuits grow, SAT-based ATPG faces challenges like pattern inflation and excessive runtime, limiting its overall performance…”
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qSeq: Full Algorithmic and Tool Support for Synthesizing Sequential Circuits in Superconducting SFQ Technology by Pasandi, Ghasem, Pedram, Massoud

“…Synthesizing general nonlinear sequential circuits in superconducting Single Flux Quantum (SFQ…”
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Synthesis of statically analyzable accelerator networks from sequential programs by Shaoyi Cheng, Wawrzynek, John

“…This paper describes a general framework for transforming a sequential program into a network of processes, which are then converted to hardware accelerators through high level synthesis…”
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Optimal circuits for parallel bit reversal by Ren Chen, Prasanna, Viktor K.

“…In this paper, we develop novel parallel circuit designs for calculating the bit reversal…”
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SeGen: Automatic Topology Generator for Sequencing Elements by Kang, Kyounghun, Jung, Wanyeong

“…Sequencing elements, such as flip-flops (FFs), significantly impact the speed, size, and power consumption of digital integrated circuits…”
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Minimizing area and power of sequential CMOS circuits using threshold decomposition by Kulkarni, Niranjan, Nukala, Nishant, Vrudhula, Sarma

“…This paper describes the design of a standard cell library of differential mode threshold gates, referred to as a Threshold Logic Latch or TLL, and new threshold function identification…”
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Security against hardware Trojan through a novel application of design obfuscation by Chakraborty, R.S., Bhunia, S.

“…Malicious hardware Trojan circuitry inserted in safety-critical applications is a major threat to national security…”
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Dynamic Verification of Sequential Consistency by Meixner, Albert, Sorin, Daniel J.

“… One such consistency model is sequential consistency (SC), which specifies that all loads and stores appear to execute in a total order that respects program order for each thread…”
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Power gating applied to MP-SoCs for standby-mode power management by Flynn, David

“…Complex SoCs from servers to intelligent sensors are increasingly built up from heterogeneous IP cores and subsystems. Accelerator blocks or additional…”
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Polynomial arithmetic using sequential stochastic logic by Saraf, Naman, Bazargan, Kia

“…We present the design of stochastic computing systems based on sequential logic to implement arbitrary polynomial functions…”
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Efficient generation of counterexamples and witnesses in symbolic model checking by Clarke, E. M., Grumberg, O., McMillan, K. L., Zhao, X.

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Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients by Badaroglu, Mustafa, Tiri, Kris, Donnay, StÉphane, Wambacq, Piet, Man, Hugo De, Verbauwhede, Ingrid, Gielen, Georges

“…In a synchronous clock distribution network with zero latencies, digital circuits switch simultaneously on the clock edge, therefore they generate substrate noise due to the sharp peaks on the supply current…”
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Skewed flip-flop transformation for minimizing leakage in sequential circuits by Seomun, Jun, Kim, Jaehyun, Shin, Youngsoo

“… However, current approaches target the combinational circuits even though sequential elements, such as flip-flops, contribute an appreciable proportion of the total leakage…”
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EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components by Wang, Mingjun, Wang, Hui, Mu, Jianan, Zhang, Xinyu, Sun, Bin, Wen, Yihan, Liu, Zizhen, Gu, Feng, Gao, Jun, Liang, Shengwen, Ye, Jing, Li, Xiaowei, Li, Huawei

“… However, for large-scale industrial sequential circuits, these simulations are time-consuming, creating a significant bottleneck in chip development…”
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Equivalence Checking of Sequential Quantum Circuits by Wang, Qisheng, Li, Riling, Ying, Mingsheng

“…We define a formal framework for equivalence checking of sequential quantum circuits…”
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Conflict driven learning in a quantified Boolean Satisfiability solver by Zhang, Lintao, Malik, Sharad

“…) as many interesting sequential circuit verification problems can be formulated as QBF instances…”
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Sequential Circuits Synthesis for Rapid Single Flux Quantum Logic Based on Finite State Machine Decomposition by Yang, Shucheng, Gao, Xiaoping, Ren, Jie

“… Logic synthesis is crucial in converting behavioral circuit description into a circuit netlist, typically combining combinational and sequential circuit synthesis…”
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Test Generation for Acyclic Sequential Circuits with Single Stuck-at Fault Combinational ATPG by Ichihara, Hideyuki, Inoue, Tomoo

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Automatic functional test generation using the extended finite state machine model by Cheng, Kwang Ting, Krishnakumar, A. S.

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