Search Results - Architecture-based verification

Towards Digital Twin-enabled DevOps for CPS providing Architecture-Based Service Adaptation & Verification at Runtime by Dobaj, Jurgen, Riel, Andreas, Krug, Thomas, Seidl, Matthias, Macher, Georg, Egretzberger, Markus

“…Background: Industrial Product-Service Systems (IPSS) denote a service-oriented way of providing access to cyber-physical systems' (CPS) capabilities. The…”
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A proposal and verification of a software architecture based on LabVIEW for a multifunctional robotic end-effector by Anjos, José Marcos Silva, Coracini, Guilherme Kisseloff, Villani, Emília

“… ► The architecture successfully deals with integration of multiple functionalities. This paper proposes a software architecture based on LabVIEW for controlling discrete event systems…”
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Boreholes Data Analysis Architecture Based on Clustering and Prediction Models for Enhancing Underground Safety Verification by Iqbal, Naeem, Rizwan, Atif, Khan, Anam Nawaz, Ahmad, Rashid, Kim, Bong Wan, Kim, Kwangsoo, Kim, Do-Hyeun

“… This research study presents a boreholes data analysis architecture based on data and predictive analysis models to improve borehole efficiency, underground safety verification, and risk evaluation…”
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Automated Verification of AADL-Specifications Using UPPAAL by Johnsen, A., Lundqvist, K., Pettersson, P., Jaradat, O.

“… To provide means for automated fault avoidance when developing systems specified in AADL, a formal verification technique has been developed to ensure completeness and consistency of an AADL…”
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Detection of Ladder Logic Bombs in PLC Control Programs: an Architecture based on Formal Verification by Iacobelli, Antonio, Rinieri, Lorenzo, Melis, Andrea, Sadi, Amir Al, Prandini, Marco, Callegati, Franco

“… (in addition to safety) concerns are of paramount importance. In this work, we present a formal verification architecture for the detection of Ladder Logic Bombs, a class…”
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Experimental Verification of Scan-Architecture-Based Evaluation Technique of SET and SEU Soft-Error Rates at Each Flip-Flop in Logic VLSI Systems by Yanagawa, Y., Kobayashi, D., Hirose, K., Makino, T., Saito, H., Ikeda, H., Onoda, S., Hirao, T., Ohshima, T.

“…Irradiation test results demonstrate the validity of a scan FF technology for separately evaluating SET and SEU soft error rates (SERs) in logic VLSI systems…”
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Architecture-Based Synthesis of 1D-3D Models for Verification and Validation by Allegaert, Elias, Lemmens, Yves, Dutre, Stefan, Garro, Alfredo, Inzillo, Marco

“…An architecture-based model-driven design approach, enabled by tools for system synthesis, simulation, and simulation content management, is exploited to efficiently explore design variants at a system level…”
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DESIGN AND VERIFICATION OF REMOTE SENSING IMAGE DATA CENTER STORAGE ARCHITECTURE BASED ON HADOOP by Tang, D., Zhou, X., Jing, Y., Cong, W., Li, C.

“…The data center is a new concept of data processing and application proposed in recent years. It is a new method of processing technologies based on data,…”
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Towards Digital Twin-enabled DevOps for CPS providing Architecture-Based Service Adaptation & Verification at Runtime by Dobaj, Jürgen, Riel, Andreas, Krug, Thomas, Seidl, Matthias, Macher, Georg, Egretzberger, Markus

“…Industrial Product-Service Systems (IPSS) denote a service-oriented (SO) way of providing access to CPS capabilities. The design of such systems bears high…”
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Modeling and verification of Industrial Microservice Architecture Based on Formal Methods by Meng, Xiangxi, Duan, Xiangyu, Tao, Wei, Luan, Yan, Zhang, Juanjuan, Wu, Donghan

“… The test and verification of microservice architecture is the guarantee of industrial application credibility…”
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Toward architecture-based test-vector generation for timing verification of fast parallel multipliers by Eriksson, H., Larsson-Edefors, P., Eckerbert, D.

“…Fast parallel multipliers that contain logarithmic partial-product reduction trees pose a challenge to simulation-based high-accuracy timing verification, since the reduction tree has many reconvergent signal branches…”
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A Formal Verification Technique for Architecture-based Embedded Systems in EAST-ADL by Eun-Young, Kang

“… In this paper, we propose an architecture-based verification technique which enhances the model-based development process supported by EAST-ADL by adapting model-checking to EAST-ADL specifications…”
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Verification of Conceptual Architecture Based on Component by Chao Ji, Qi Chen, Xin He, Guanglei Qi

“…At present, few methods of creating conceptual architecture have been proposed. What's more, they can't meet the requirements of dynamic Internet environment…”
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Synopsys Enables First-Pass Silicon Success for Early Adopters of Next-Generation Armv9 Architecture-based SoCs: Design, Verification, and IP Solutions Combine to Deliver a Total-Compute-centric Solution That Enables Maximum Performance-Per-Watt for High-End Consumer Devices

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AQAF: An Architecture Quality Assurance Framework for Systems Modeled in AADL by Johnsen, Andreas, Lundqvist, Kristina, Hanninen, Kaj, Pettersson, Paul, Torelm, Martin

“… There is consequently little room for faults, which may cause substantial costs and devastating harm. Verification in architecture engineering should therefore be holistically…”
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Modular verification and validation for NATO generic vehicle architecture-based land platforms by Ota, Daniel, Pradhan, Manas

“…) and specifies how Verification and Validation (V&V) of entire NGVA systems can be conducted. In case of a configuration…”
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A Formal Verification Methodology for Cache Architectures Based on Noninterference Hyperproperties by Zhang, Yusha, Zhu, Ziyuan, Liu, Yuxin, Tong, Zhongkai, Cai, Wenjing, Meng, Dan

“… Therefore, it is imperative to establish a universal and comprehensive formal verification methodology to evaluate the security of cache designs…”
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Generation and validation of traces between requirements and architecture based on formal trace semantics by Goknil, Arda, Kurtev, Ivan, Van Den Berg, Klaas

“…•Requirements relations and architecture verification techniques are used.•A trace metamodel is defined with commonly used trace types between requirements and architecture…”
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Design, development and testing of a 16-bit reduced instruction set computer architecture based processor by Jain, Manan, Kanzariya, Het, Joshi, Neel, Masharu, Yesha, Gajjar, Sachin, Shah, Dhaval

“…) architecture using a multicycle data path. The design, development, and verification were carried-out using Xilinx Vivado, Xilinx Power Estimator, and Modelsim tools…”
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An architecture-based comparison of verification and statistical reliability assessment methods for embedded software systems by Bastani, F.B., Sung Kim, I-Ling Yen, Ing-Ray Chen

“… for certifying the system based on the certification of the independent aspects and the system architecture…”
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