Suchergebnisse - unified encryption/decryption architecture

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  1. 1

    A high performance ST-Box based unified AES encryption/decryption architecture on FPGA von Kundi, D.-S., Aziz, Arshad, Ikram, Nassar

    ISSN: 0141-9331, 1872-9436
    Veröffentlicht: Elsevier B.V 01.03.2016
    Veröffentlicht in Microprocessors and microsystems (01.03.2016)
    “… •A single integrated and symmetric ST-Box structure followed by a single XOR Network is proposed for a unified AES encryptor and decryptor architecture …”
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    Journal Article
  2. 2

    High Throughput/Gate AES Hardware Architectures Based on Datapath Compression von Ueno, Rei, Homma, Naofumi, Morioka, Sumio, Miura, Noriyuki, Matsuda, Kohei, Nagata, Makoto, Bhasin, Shivam, Mathieu, Yves, Graba, Tarik, Danger, Jean-Luc

    ISSN: 0018-9340, 1557-9956
    Veröffentlicht: New York IEEE 01.04.2020
    Veröffentlicht in IEEE transactions on computers (01.04.2020)
    “… To the best of our knowledge, the proposed architecture has the shortest critical path delay and is the most efficient in terms of throughput per area among conventional AES encryption/decryption …”
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    Journal Article
  3. 3

    High throughput and resource efficient AES encryption/decryption for SANs von Wang, Yi, Ha, Yajun

    ISSN: 2379-447X
    Veröffentlicht: IEEE 01.05.2016
    “… ) and Digital Signal Processing (DSP) slices. We also propose a unified architecture for AES encryption and decryption …”
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    Tagungsbericht Journal Article
  4. 4

    Image Encryption and Decryption Using Vigenere Cipher with Compute Unified Device Architecture (CUDA) von Kusuma, Arjuna Wahyu, Damanhuri, R., Baihaqi, Muhamad Nur, Sanjaya, Labib Habibie

    ISSN: 2086-4930, 2777-0648
    Veröffentlicht: Universitas Diponegoro 21.06.2023
    Veröffentlicht in Jurnal Masyarakat Informatika (21.06.2023)
    “… Compute Unified Device Architecture (CUDA) adalah Application Programming Interface (API …”
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    Journal Article
  5. 5

    An application specific instruction set processor (ASIP) for the niederreiter cryptosystem von Hu, Jingwei, Dai, Wangchen, Yao, Liu, Cheung, Ray C.C

    Veröffentlicht: IEEE 01.03.2018
    “… In this work, we provide a unified architecture to achieve efficient Niederreiter digital signature and extend it to perform encryption/decryption on reconfigurable hardware …”
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    Tagungsbericht
  6. 6

    IMCRYPTO: An In-Memory Computing Fabric for AES Encryption and Decryption von Reis, Dayane, Geng, Haoran, Niemier, Michael, Hu, Xiaobo Sharon

    ISSN: 1063-8210, 1557-9999
    Veröffentlicht: New York IEEE 01.05.2022
    “… ) encryption and decryption. IMCRYPTO employs a unified structure to implement encryption and decryption in a single-hardware architecture with combined (Inv)SubBytes and (Inv)MixColumns steps …”
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    Journal Article
  7. 7

    A low-area unified hardware architecture for the AES and the cryptographic hash function Grøstl von At, Nuray, Beuchat, Jean-Luc, Okamoto, Eiji, San, Ismail, Yamazaki, Teppei

    ISSN: 0743-7315, 1096-0848
    Veröffentlicht: Elsevier Inc 01.08.2017
    Veröffentlicht in Journal of Parallel and Distributed Computing (01.08.2017)
    “… ) (encryption, decryption, and key expansion) and the cryptographic hash function Grøstl. Our Arithmetic and Logic Unit has only one instruction that allows for implementing AES encryption, AES decryption, AES key expansion …”
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    Journal Article
  8. 8

    Homomorphic Encryption and Decryption Hardware Design using Shared Arithmetic and Configurable Butterfly Unit von Kim, Seung-Chan, Kim, Dong-Sun

    ISSN: 2767-7699
    Veröffentlicht: IEEE 19.01.2025
    “… Hardware resource optimization is achieved using a unified butterfly architecture and a shared arithmetic in the encryption/decryption process …”
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    Tagungsbericht
  9. 9

    SUACC-IoT: secure unified authentication and access control system based on capability for IoT von Sivaselvan, N., Bhat, K. Vivekananda, Rajarajan, Muttukrishnan, Das, Ashok Kumar, Rodrigues, Joel J. P. C.

    ISSN: 1386-7857, 1573-7543
    Veröffentlicht: New York Springer US 01.08.2023
    Veröffentlicht in Cluster computing (01.08.2023)
    “… With the widespread use of Internet of Things (IoT) in various applications and several security vulnerabilities reported in them, the security requirements …”
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    Journal Article
  10. 10

    A high-speed unified hardware architecture for 128 and 256-bit security levels of AES and the SHA-3 candidate Grøstl von Rogawski, Marcin, Gaj, Kris, Homsirikamol, Ekawat

    ISSN: 0141-9331, 1872-9436
    Veröffentlicht: Elsevier B.V 01.08.2013
    Veröffentlicht in Microprocessors and microsystems (01.08.2013)
    “… and encryption/decryption with relatively small penalty in terms of area and speed when compared to the authentication (original Grøstl circuitry) functionality …”
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    Journal Article
  11. 11

    Password Recovery for RAR Files Using CUDA von Guang Hu, Jianhua Ma, Benxiong Huang

    ISBN: 0769539297, 9781424454204, 1424454204, 9780769539294
    Veröffentlicht: IEEE 01.12.2009
    “… Our research focus is on the AES key generation processing, which is the most time consuming stage in the whole RAR encryption/decryption process …”
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    Tagungsbericht
  12. 12

    Secure breast cancer imaging: A novel advanced generative model encryption approach von Inam, Saba, Kanwal, Shamsa, Hajjej, Fahima, Saleh Alluhaidan, Ala

    ISSN: 0952-1976
    Veröffentlicht: Elsevier Ltd 01.01.2026
    Veröffentlicht in Engineering applications of artificial intelligence (01.01.2026)
    “… The proposed work presents a novel Artificial Intelligence (AI) technique, specifically a Cyclic-Generative Adversarial Network (Cyclic GAN)-based encryption …”
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    Journal Article
  13. 13

    A low-area unified hardware architecture for the AES and the cryptographic hash function ECHO von Beuchat, Jean-Luc, Okamoto, Eiji, Yamazaki, Teppei

    ISSN: 2190-8508, 2190-8516
    Veröffentlicht: Berlin/Heidelberg Springer-Verlag 01.08.2011
    Veröffentlicht in Journal of cryptographic engineering (01.08.2011)
    “… We propose a compact coprocessor for the AES (encryption, decryption, and key expansion …”
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    Journal Article
  14. 14

    A Robust Chaos-Based Technique for Medical Image Encryption von Yasser, Ibrahim, Khalil, Abeer T., Mohamed, Mohamed A., Samra, Ahmed S., Khalifa, Fahmi

    ISSN: 2169-3536, 2169-3536
    Veröffentlicht: Piscataway IEEE 2022
    Veröffentlicht in IEEE access (2022)
    “… ) necessitate important prerequisites, such as secrecy, legitimacy, and integrity. This paper recommends a novel hybrid encryption/decryption scheme that can be applied in e-healthcare, or IoHS, for the protection of medical images …”
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    Journal Article
  15. 15

    Efficient configurations for block ciphers with unified ENC/DEC paths von Banik, Subhadeep, Bogdanov, Andrey, Regazzoni, Francesco

    Veröffentlicht: IEEE 01.05.2017
    “… Depending on the algebraic structure of a given cipher, there may be multiple ways of constructing the combined encryption/decryption circuit, each targeted at optimizing lightweight design metrics …”
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    Tagungsbericht
  16. 16

    Integration of the AES Cryptography Extension into a RISC-V Architecture von Tran, Kelvin

    ISBN: 9798290934839
    Veröffentlicht: ProQuest Dissertations & Theses 01.01.2025
    “… ). This algorithm contains many rounds of substitution and permutations using a key to ensure secure encryption/decryption …”
    Volltext
    Dissertation
  17. 17

    UniStream: A unified stream architecture combining configuration and data processing von Jian Yan, Jifang Jin, Ying Wang, Xuegong Zhou, Leong, Philip, Lingli Wang

    ISSN: 1946-147X
    Veröffentlicht: Imperial College 01.09.2015
    “… This paper proposes UniStream, a unified stream architecture based on point-to-point stream channels combining both bitstream configuration and data stream processing …”
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    Tagungsbericht
  18. 18

    Analyzing Secure Memory Architecture for GPUs von Yuan, Shougang, Baskara Yudha, Ardhi Wiratama, Solihin, Yan, Zhou, Huiyang

    Veröffentlicht: IEEE 01.03.2021
    “… Wide adoption of cloud computing makes privacy and security a primary concern. Although recent CPUs have integrated secure memory architecture, such support is still missing for GPUs, a key accelerator in data centers …”
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    Tagungsbericht
  19. 19

    Low-Delay AES Key Expansion Units Based on DDBT Structure von Zheng, Xinxing, Yan, Han, Peng, Zhiwei, Zhang, Xiaoqiang

    ISSN: 2079-9292, 2079-9292
    Veröffentlicht: Basel MDPI AG 01.01.2025
    Veröffentlicht in Electronics (Basel) (01.01.2025)
    “… Based on the proposed design method, a low-delay AES encryption key expansion unit and a low-delay AES encryption/decryption unified key expansion unit are designed in this paper …”
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    Journal Article
  20. 20

    Enhancing Blowfish file encryption algorithm through parallel computing on GPU von Mahajan, Tejal, Masih, Shraddha

    Veröffentlicht: IEEE 01.09.2015
    “… Parallel computing can provide fast execution of the program as compared to sequential computing. Graphical Processing Unit can be used for parallel computing …”
    Volltext
    Tagungsbericht