Suchergebnisse - algorithm hardware implementation

Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF (2 m ) fields von Parrilla, L., Lloris, A., Castillo, E., García, A.

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Security of Block Ciphers: From Algorithm Design to Hardware Implementation von Sakiyama, Kazuo, Sasaki, Yu, Li, Yang

“… * Unique in its combination of both algorithmic-level design and hardware-level implementation …”
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A Hardware Implementation of Spaceborne SAR BP Algorithm Based on Precise Region Focusing and Hardware-Software Collaboration von Li, Yongrui, Chen, Liang, Zheng, Pengnan, Ding, Jie, Zhang, Zhihan, Yang, Zhu, Xie, Yizhuang, Li, Han

“… Given the limited resources of the satellite's hardware platform, the traditional hardware implementation of the algorithm …”
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"MR Q-Learning" Algorithm for Efficient Hardware Implementations von Carlo Cardarilli, Gian, Di Nunzio, Luca, Fazzolari, Rocco, Giardino, Daniele, Natale, Dario, Re, Marco, Spano, Sergio

“… The maximum value finder block is one of the most critical parts in the hardware implementation of the Q-Learning Reinforcement Learning algorithm …”
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Area–Time-Efficient High-Radix Modular Inversion Algorithm and Hardware Implementation for ECC over Prime Fields von Li, Yamin

“… We investigate the state-of-the-art modular inversion algorithms, and evaluate the performance and cost of the algorithms and their hardware implementations …”
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Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF(2^sup m^) fields von Parrilla, L, Lloris, A, Castillo, E, García, A

“… The Itoh-Tsujii algorithm (ITA) provides high performance implementations for the inversion operation in standard bases through diverse versions like squarer-ITA, parallel squarer-ITA or quad-ITA …”
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Direct Neural-Network Hardware-Implementation Algorithm von Dinu, Andrei, Cirstea, Marcian N, Cirstea, Silvia E

“… An algorithm for compact neural-network hardware implementation is presented, which exploits the special properties of the Boolean functions describing the operation of artificial neurons with step activation function …”
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A Ultra-Low Cost and Accurate AMC Algorithm and Its Hardware Implementation von Zhao, Yuqin, Deng, Tiantai, Gavin, Bill, Ball, Edward A., Seed, Luke

“… To address the challenges of speed and accuracy, this article presents a low-cost, and accurate AMC algorithm and its FPGA implementation that can achieve both fast and accurate results at the same time …”
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Real-time optical flow processing on embedded GPU: an hardware-aware algorithm to implementation strategy von Seznec, Mickaël, Gac, Nicolas, Orieux, François, Naik, Alvin Sashala

“… For achieving this processing in real time, the whole algorithm deployment chain must be thought of for efficiency first …”
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Lightweight and flexible hardware implementation of authenticated encryption algorithm SIMON‐Galois/Counter Mode von Cheng, Xin, Xu, Yixuan, Wang, Kefan, Zhang, Yongqiang, Li, Bin, Zhang, Zhang

“… Summary This brief proposes a new lightweight authenticated encryption algorithm SIMON …”
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A high‐speed and low‐latency hardware implementation of RC4 cryptographic algorithm von Sun, Caiban, Liu, Wenrui, Cheng, Jiafeng, Sun, Nengyuan, Peng, Zhaokang, Sha, Heng, Yu, Weize

“… In this letter, a high‐speed and low‐latency Ron Rivest‐4 (RC4) encryption algorithm is designed based on SMIC 14 nm process …”
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Computer vision algorithms and hardware implementations: A survey von Feng, Xin, Jiang, Youni, Yang, Xuejiao, Du, Ming, Li, Xin

“… This paper aims at providing a comprehensive survey of the recent progress on computer vision algorithms and their corresponding hardware implementations …”
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Optimization and hardware implementation of noise reduction algorithm for low‐power audio chip von Wang, Ang, Yu, Lina, Lan, Yuyan, Zhou, Weixin, Xiao, Wan'ang

“… ‐power hardware implementation are studied. Several types of common noise reduction algorithms are analyzed and simulated, and the log …”
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Algorithm and hardware implementation for visual perception system in autonomous vehicle: A survey von Shi, Weijing, Alawieh, Mohamed Baker, Li, Xin, Yu, Huafeng

“… This paper briefly surveys the recent progress on visual perception algorithms and their corresponding hardware implementations for the emerging application of autonomous driving …”
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Local tone mapping algorithm and hardware implementation von Yang, J, Hore, A, Yadid-Pecht, O

“… A novel tone mapping algorithm and hardware implementation for displaying wide dynamic range (WDR …”
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Decoder-Side Motion Vector Refinement in VVC: Algorithm and Hardware Implementation Considerations von Gao, Han, Chen, Xu, Esenlik, Semih, Chen, Jianle, Steinbach, Eckehard

“… Furthermore, the hardware implementation considerations of the DMVR design are particularly focused in this study …”
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An Interpolation-Free Fractional Motion Estimation Algorithm and Hardware Implementation for VVC von Chen, Shushi, Huang, Leilei, Zan, Zhao, Zeng, Xiaoyang, Fan, Yibo

“… In this context, this article proposes an interpolation-free algorithm based on an error surface to improve the throughput of FME hardware …”
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Initial settings of Berlekamp‐Massey algorithm for efficient hardware implementation von Lu, Y.K., Shieh, M.D.

“… ‐based algorithms and architectures have been presented in recent years. Introduced are different initial settings of the BM algorithm that can reduce cost and power consumption for VLSI implementation …”
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Soft decoding of the (23, 12, 7) Golay code: simplified algorithm and hardware implementation von Xie, D., Li, Y.

“… Based on the simplified algorithm, this study investigates an efficient hardware implementation on field programmer gate array platform, and presents a detailed architecture of the soft decoder. Experimental result indicates that, the proposed algorithm uses less hardware complexity and has high-throughput rate, therefore it is naturally suitable for very large scale integration implementation …”
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A Hardware-Oriented IME Algorithm for HEVC and Its Hardware Implementation von Fan, Yibo, Huang, Leilei, Hao, Bei, Zeng, Xiaoyang

“… In response to this challenge, we developed a hardware-oriented integer ME algorithm and the related hardware implementation …”
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