Suchergebnisse - Processors—compilers Algorithms

  1. 1

    shade.js: Adaptive Material Descriptions von Sons, Kristian, Klein, Felix, Sutter, Jan, Slusallek, Philipp

    ISSN: 0167-7055, 1467-8659
    Veröffentlicht: Oxford Blackwell Publishing Ltd 01.10.2014
    Veröffentlicht in Computer graphics forum (01.10.2014)
    “… In computer graphics a material is a visual concept that is parameterizable and should work for arbitrary 3D assets and rendering systems. Since provided …”
    Volltext
    Journal Article
  2. 2

    Optimizing shared cache behavior of chip multiprocessors von Kandemir, Mahmut, Muralidhara, Sai Prashanth, Narayanan, Sri Hari Krishna, Zhang, Yuanrui, Ozturk, Ozcan

    ISBN: 9781605587981, 1605587982
    ISSN: 1072-4451
    Veröffentlicht: New York, NY, USA ACM 12.12.2009
    “… One of the critical problems associated with emerging chip multiprocessors (CMPs) is the management of on-chip shared cache space. Unfortunately, single …”
    Volltext
    Tagungsbericht
  3. 3

    ReAAP: A Reconfigurable and Algorithm-Oriented Array Processor with Compiler-Architecture Co-Design von Zheng, Jianwei, Liu, Yu, Liu, Xuejiao, Liang, Luhong, Chen, Deming, Cheng, Kwang-Ting

    ISSN: 0018-9340, 1557-9956
    Veröffentlicht: New York IEEE 01.01.2022
    Veröffentlicht in IEEE transactions on computers (01.01.2022)
    “… In this paper, we propose a compiler-architecture co-design scheme targeting a reconfigurable and algorithm-oriented array processor, named ReAAP …”
    Volltext
    Journal Article
  4. 4

    Software based techniques for robust computing on Chip Multiprocessors von Narayanan, Sri Hari Krishna

    ISBN: 9781124459509, 1124459502
    Veröffentlicht: ProQuest Dissertations & Theses 01.01.2008
    “… Robustness and performance are two requirements of any computing system. They may be quantified by different metrics depending on the domain of Computer …”
    Volltext
    Dissertation
  5. 5

    Data flow anomaly detection of recursive procedures von Livadas, Panos E., Qi Tsao, Qing

    ISSN: 0020-7160, 1029-0265
    Veröffentlicht: Abingdon Gordon and Breach Science Publishers S.A 01.01.1994
    Veröffentlicht in International journal of computer mathematics (01.01.1994)
    “… Let P be a program and v be a variable of P; let G p be the flowgraph of P; and, let p 1 , be a node in G P that corresponds to a point in P where a variable v …”
    Volltext
    Journal Article
  6. 6

    SoftExplorer: Estimating and Optimizing the Power and Energy Consumption of a C Program for DSP Applications von Senn, Eric, Laurent, Johann, Julien, Nathalie, Martin, Eric

    ISSN: 1687-6180, 1110-8657, 1687-6172, 1687-6180, 1687-0433
    Veröffentlicht: Hindawi Publishing Corporation 01.01.2005
    Veröffentlicht in EURASIP journal on advances in signal processing (01.01.2005)
    “… Three models are involved: a model for the targeted processor the power model), a model for the algorithm, and a model for the compiler …”
    Volltext
    Journal Article
  7. 7

    Embedded Processor Oriented Compiler Infrastructure von DJUKIC, M., POPOVIC, M., CETIC, N., POVAZAN, I.

    ISSN: 1582-7445, 1844-7600
    Veröffentlicht: Stefan cel Mare University of Suceava 01.01.2014
    Veröffentlicht in Advances in Electrical and Computer Engineering (01.01.2014)
    “… In the recent years, research of special compiler techniques and algorithms for embedded processors broaden the knowledge of how to achieve better compiler performance in irregular processor architectures …”
    Volltext
    Journal Article
  8. 8

    Tensor Instruction Generation Optimization Fusing with Loop Partitioning von Liang, Jiali, Hua, Baojian, Su, Shaobo

    ISSN: 1002-137X
    Veröffentlicht: Chongqing Guojia Kexue Jishu Bu 01.02.2023
    Veröffentlicht in Ji suan ji ke xue (01.02.2023)
    “… The tensor compiler compiles the tensor algorithm and schedule of the operator into the code of the target …”
    Volltext
    Journal Article
  9. 9

    A methodology for speeding up loop kernels by exploiting the software information and the memory architecture von Kelefouras, Vasilios, Kritikakou, Angeliki, Goutis, Costas

    ISSN: 1477-8424, 1873-6866
    Veröffentlicht: Elsevier Ltd 01.04.2015
    Veröffentlicht in Computer languages, systems & structures (01.04.2015)
    “… Second, they take into account only part of the specific algorithm׳s information. Third, they take into account only a few hardware architecture parameters …”
    Volltext
    Journal Article
  10. 10

    System dynamics monitoring using PIC micro-controller-based PLSE von Djeufa Dagoumguei, Guy Morgand, Tagne, Samuel, Eyebe Fouda, J S Armand, Koepf, Wolfram

    ISSN: 1089-7682, 1089-7682
    Veröffentlicht: United States 01.07.2023
    Veröffentlicht in Chaos (Woodbury, N.Y.) (01.07.2023)
    “… The PLSE algorithm is optimized to fit the program and data memory of low-end processors using the XC8 compiler and the MPLAB X IDE …”
    Weitere Angaben
    Journal Article
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    Soft Error Reliability Assessment of Lightweight Cryptographic Algorithms for IoT Edge Devices von Rocha, Vinicius Da, Moura, Nicolas, Gava, Jonas, Bandeira, Vitor, Ost, Luciano, Reis, Ricardo, Garibotti, Rafael

    ISSN: 2158-1525
    Veröffentlicht: IEEE 28.05.2022
    “… This paper performs soft error analysis for ten lightweight cryptographic algorithms considering two compilers and running on top of an IoT-ready commercial processor model (i.e. Arm Cortex-M7 …”
    Volltext
    Tagungsbericht
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    Understand Code Style: Efficient CNN-Based Compiler Optimization Recognition System von Yang, Shouguo, Shi, Zhiqiang, Zhang, Guodong, Li, Mingxuan, Ma, Yuan, Sun, Limin

    ISSN: 1938-1883
    Veröffentlicht: IEEE 01.05.2019
    “… There are thousands of compiler optimization algorithms and multiple different processor architectures, so it is very difficult to manually analyze binary files and recognize its compiler optimization level with rules …”
    Volltext
    Tagungsbericht
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    Optimal algorithm for profile-based power gating: A compiler technique for reducing leakage on execution units in microprocessors von Danbee Park, Jungseob Lee, Nam Sung Kim, Taewhan Kim

    ISBN: 1424481937, 9781424481934
    ISSN: 1092-3152
    Veröffentlicht: IEEE 01.11.2010
    “… Precisely, based on an execution profile of code containing conditional branches and/or loops, we propose a polynomial time optimal algorithm, called PG-instr, of inserting ON/OFF instructions …”
    Volltext
    Tagungsbericht
  14. 14

    Efficient methodology for hand-coding video algorithms for VLIW-type processors von Sohm, Oliver P., Bull, David R., Canagarajah, C.Nishan

    ISSN: 0923-5965, 1879-2677
    Veröffentlicht: Amsterdam Elsevier B.V 01.04.2002
    Veröffentlicht in Signal processing. Image communication (01.04.2002)
    “… Although sophisticated compilers are available for VLIW-type processors, time-critical video coding algorithms can often be more efficiently coded by hand …”
    Volltext
    Journal Article
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    Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors von Kim, Hyesoon, Joao, José A., Mutlu, Onur, Patt, Yale N.

    ISBN: 9780769527642, 0769527647
    Veröffentlicht: Washington, DC, USA IEEE Computer Society 11.03.2007
    “… This paper describes compiler support for obtaining high performance in the diverge-merge processor …”
    Volltext
    Tagungsbericht
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    RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors von Akturan, Cagdas, Jacome, Margarida F.

    ISBN: 1581133642, 9781581133646
    Veröffentlicht: New York, NY, USA ACM 25.04.2001
    “… ), suitable for optimizing compilers targeting embedded VLIW processors. The key difference between RS-FDRA and previous approaches is that our algorithm can handle code size constraints along with latency and resource constraints …”
    Volltext
    Tagungsbericht
  17. 17

    Loop scheduling for heterogeneity von Cierniak, M., Wei Li, Zaki, M.J.

    ISBN: 0818670886, 9780818670886
    ISSN: 1082-8907
    Veröffentlicht: IEEE 1995
    “… , and develop compiler algorithms for generating optimal and sub-optimal schedules of loops for load …”
    Volltext
    Tagungsbericht Journal Article
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    Exploiting Computation Reuse for Stencil Accelerators von Chi, Yuze, Cong, Jason

    Veröffentlicht: United States IEEE 01.07.2020
    “… Stencil kernel is an important type of kernel used extensively in many application domains. Over the years, researchers have been studying the optimizations on …”
    Volltext
    Tagungsbericht Journal Article
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    A methodology correlating code optimizations with data memory accesses, execution time and energy consumption von Kelefouras, Vasilios, Djemame, Karim

    ISSN: 0920-8542, 1573-0484
    Veröffentlicht: New York Springer US 01.10.2019
    Veröffentlicht in The Journal of supercomputing (01.10.2019)
    “… ) and algorithm characteristics (e.g., data reuse); therefore, compiler designers and researchers either do not take them into account at all or …”
    Volltext
    Journal Article
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    Improving cache locality by a combination of loop and data transformations von Kandemir, M., Ramanujam, J., Choudhary, A.

    ISSN: 0018-9340
    Veröffentlicht: IEEE 01.02.1999
    Veröffentlicht in IEEE transactions on computers (01.02.1999)
    “… This paper describes a compiler algorithm for optimizing cache locality in scientific codes on uniprocessor and multiprocessor machines …”
    Volltext
    Journal Article