Suchergebnisse - Network Architecture and Design—Store and forward networks
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Design and implementation of semi-physical simulation platform in space delay tolerant network
ISSN: 1000-0801Veröffentlicht: Beijing Xintong Media Co., Ltd 01.07.2016Veröffentlicht in Dianxin Kexue (01.07.2016)“… The architecture of space delay tolerant networking can effectively support a deep space communication network with long delay, high error rate and on-off frequently link characteristics through …”
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Design and implementation of semi-physical simulation platform in space delay tolerant network
ISSN: 1000-0801Veröffentlicht: Beijing Xintong Media Co., Ltd 01.07.2016Veröffentlicht in Dianxin Kexue (01.07.2016)“… The architecture of space delay tolerant networking can effectively support a deep space communication network with long delay,high error rate and on-off frequently link characteristics through …”
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Delay Tolerant Payload Conditioning protocol
ISSN: 1389-1286, 1872-7069Veröffentlicht: Kidlington Elsevier B.V 11.02.2014Veröffentlicht in Computer networks (Amsterdam, Netherlands : 1999) (11.02.2014)“… Consistent with its store-and-forward requirements, the design of the transport function of the DTN architecture was primarily based on hop-by-hop operations in preference to the traditional end …”
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Methods for Determining the Restoration Order of Base Nodes in the Virtual Segment Network
Veröffentlicht: IEEE 01.09.2013Veröffentlicht in 2013 5th International Conference on Intelligent Networking and Collaborative Systems (01.09.2013)“… Virtual Segment (VS) is an architecture design for delay tolerant network to efficiently perform the store-carry-and-forward routing along traffic flows of vehicles on roadway networks …”
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Feedback control of congestion in packet switching networks: the case of multiple congested nodes
ISBN: 0780317831, 9780780317833Veröffentlicht: IEEE 1994Veröffentlicht in American Control Conference, 1994 (1994)“… In this paper, an analytical method for the design of a congestion control scheme in store-and-forward networks is presented …”
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Network on chip design and implementation on FPGA with advanced hardware and networking functionalities
Veröffentlicht: IEEE 01.07.2013Veröffentlicht in 2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT) (01.07.2013)“… To overcome the above said problems of scalability and complexity, Networks-On-Chip (NoCs) have been proposed …”
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