Suchergebnisse - Discrete mathematics—Graph algorithms General Terms
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Lovász-Type Theorems and Game Comonads
Veröffentlicht: IEEE 29.06.2021Veröffentlicht in Proceedings of the 36th Annual ACM/IEEE Symposium on Logic in Computer Science (29.06.2021)“… As special cases of this general theorem, we obtain two variants of Lovász' theorem: the result by Dvořák (2010) that characterises equivalence of graphs in the k …”
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Revisiting Resolution and Inter-Layer Coupling Factors in Modularity for Multilayer Networks
ISBN: 1450349935, 9781450349932Veröffentlicht: New York, NY, USA ACM 31.07.2017Veröffentlicht in Proceedings of the 2017 IEEE/ACM International Conference on Advances in Social Networks Analysis and Mining 2017 (31.07.2017)“… Modularity for multilayer networks, also called multislice modularity, is parametric to a resolution factor and an inter-layer coupling factor. The former is …”
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On the general false path problem in timing analysis
ISBN: 0897913108, 9780897913102ISSN: 0738-100XVeröffentlicht: New York, NY, USA ACM 01.06.1989Veröffentlicht in 26th ACM/IEEE Design Automation Conference (01.06.1989)“… We present an efficient algorithm for solving the general false path problem. We also propose another algorithm which generates all the possible sensitizable paths with the delays greater than a given threshold …”
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Optimal non-uniform wire-sizing under the Elmore delay model
ISBN: 0818675977, 9780818675973Veröffentlicht: Washington, DC, USA IEEE Computer Society 01.01.1997Veröffentlicht in Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design (01.01.1997)“… Experimental results show that our algorithms are efficient both in terms of runtime and storage …”
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Optimum reduction of programmable logic array
ISBN: 0818600268, 9780818600265Veröffentlicht: Piscataway, NJ, USA IEEE Press 27.06.1983Veröffentlicht in Proceedings of the 20th Design Automation Conference (27.06.1983)“… A heuristic algorithm with error bound is given for a general bipartite graph. A new graph model is introduced …”
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A data structure for circuit net lists
ISBN: 0818688645, 9780818688645Veröffentlicht: Los Alamitos, CA, USA IEEE Computer Society Press 01.06.1988Veröffentlicht in Proceedings of the 25th ACM/IEEE Design Automation Conference (01.06.1988)“… It adds separate structures (arrays) for cell type and I/O pad specific information, stores net lists defined in terms of primitive elements or cells as two superimposed symmetric incidence list form directed graphs, and separates …”
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Minplex-a compactor that minimizes the bounding rectangle and individual rectangles in a layout
ISBN: 0818607025, 9780818607028Veröffentlicht: Piscataway, NJ, USA IEEE Press 02.07.1986Veröffentlicht in Proceedings of the 23rd ACM/IEEE Design Automation Conference (02.07.1986)“… This approach provides a general and rigorous method for wire-length minimization. Algorithms for generating and solving the constraint graph are proposed …”
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