Suchergebnisse - [INFO.INFO-AO] Computer Science [cs]/Computer Arithmetic

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  1. 1

    Improved Error Bounds for Inner Products in Floating-Point Arithmetic von Jeannerod, Claude-Pierre, Rump, Siegfried M.

    ISSN: 0895-4798, 1095-7162
    Veröffentlicht: Philadelphia Society for Industrial and Applied Mathematics 01.01.2013
    Veröffentlicht in SIAM journal on matrix analysis and applications (01.01.2013)
    “… Given two floating-point vectors $x,y$ of dimension $n$ and assuming rounding to nearest, we show that if no underflow or overflow occurs, any evaluation order …”
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    Journal Article
  2. 2

    Fast Modular Arithmetic on the Kalray MPPA-256 Processor for an Energy-Efficient Implementation of ECM von Ishii, Masahiro, Detrey, Jeremie, Gaudry, Pierrick, Inomata, Atsuo, Fujikawa, Kazutoshi

    ISSN: 0018-9340, 1557-9956
    Veröffentlicht: New York IEEE 01.12.2017
    Veröffentlicht in IEEE Transactions on Computers (01.12.2017)
    “… In this article, we investigate its performance in multiprecision arithmetic for number-theoretic applications …”
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    Journal Article
  3. 3

    Improved Backward Error Bounds for LU and Cholesky Factorizations von Rump, Siegfried M., Jeannerod, Claude-Pierre

    ISSN: 0895-4798, 1095-7162
    Veröffentlicht: Philadelphia Society for Industrial and Applied Mathematics 01.01.2014
    Veröffentlicht in SIAM journal on matrix analysis and applications (01.01.2014)
    “… Assuming standard floating-point arithmetic (in base $\beta$, precision $p$) and barring underflow and overflow, classical rounding error analysis of the LU or Cholesky factorization of an $n\times n$ matrix …”
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    Journal Article
  4. 4

    High Throughput/Gate AES Hardware Architectures Based on Datapath Compression von Ueno, Rei, Homma, Naofumi, Morioka, Sumio, Miura, Noriyuki, Matsuda, Kohei, Nagata, Makoto, Bhasin, Shivam, Mathieu, Yves, Graba, Tarik, Danger, Jean-Luc

    ISSN: 0018-9340, 1557-9956
    Veröffentlicht: New York IEEE 01.04.2020
    Veröffentlicht in IEEE transactions on computers (01.04.2020)
    “… This article proposes highly efficient Advanced Encryption Standard (AES) hardware architectures that support encryption and both encryption and decryption …”
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    Journal Article
  5. 5

    Memristive Computational Memory Using Memristor Overwrite Logic (MOL) von Alhaj Ali, Khaled, Rizk, Mostafa, Baghdadi, Amer, Diguet, Jean-Philippe, Jomaah, Jalal, Onizawa, Naoya, Hanyu, Takahiro

    ISSN: 1063-8210, 1557-9999
    Veröffentlicht: New York IEEE 01.11.2020
    “… In this article, we present a novel logic design style, namely, memristor overwrite logic (MOL), associated with an original MOL-based computational memory …”
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    Journal Article
  6. 6

    Improved error bounds for floating-point products and Horner’s scheme von Florian Bünger, Siegfried M. Rump, Claude-Pierre Jeannerod

    ISSN: 0006-3835, 1572-9125
    Veröffentlicht: Springer Science and Business Media LLC 24.03.2015
    Veröffentlicht in BIT Numerical Mathematics (24.03.2015)
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    Journal Article
  7. 7

    Towards FHE in Embedded Systems: A Preliminary Codesign Space Exploration of a HW/SW Very Large Multiplier von Ghada, Abozaid, Tisserand, Arnaud, Ahmed, El-Mahdy, Yasutaka, Wada

    ISSN: 1943-0663, 1943-0671
    Veröffentlicht: Institute of Electrical and Electronics Engineers (IEEE) 01.09.2015
    Veröffentlicht in IEEE Embedded Systems Letters (01.09.2015)
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    Journal Article
  8. 8

    Networked Power-Gated MRAMs for Memory-Based Computing von Diguet, Jean-Philippe, Onizawa, Naoya, Rizk, Mostafa, Sepulveda, Johanna, Baghdadi, Amer, Hanyu, Takahiro

    ISSN: 1063-8210, 1557-9999
    Veröffentlicht: New York IEEE 01.12.2018
    “… Emerging nonvolatile memory technologies open new perspectives for original computing architectures. In this paper, we propose a new type of flexible and …”
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    Journal Article
  9. 9

    Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology von Danger, Jean-Luc, Yashiro, Risa, Graba, Tarik, Mathieu, Yves, Si-Merabet, Abdelmalek, Sakiyama, Kazuo, Miura, Noriyuki, Nagata, Makoto

    Veröffentlicht: IEEE 01.08.2018
    “… An SR-latch can be regarded as primitive to build a True Random Number Generation (TRNG) or Physically Unclonable Function (PUF). Indeed, when the SR inputs of …”
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  10. 10

    Precision variable anonymization method supporting transprecision computing von Harada, Keiya, Charles, Henri-Pierre, Nishi, Hiroaki

    ISSN: 1738-9445
    Veröffentlicht: Global IT Research Institute - GIRI 01.02.2020
    “… Recently, the number of Internet of Things (IoT) sensors has been increasing rapidly; hence, various data are gathered. As a secondary use of the data, they …”
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    Tagungsbericht