Výsledky vyhledávání - Processors architectures: multiple data stream architectures ..Array and vector processors

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    A Hybrid RF/Baseband Precoding Processor Based on Parallel-Index-Selection Matrix-Inversion-Bypass Simultaneous Orthogonal Matching Pursuit for Millimeter Wave MIMO Systems Autor Lee, Yun-Yueh, Wang, Ching-Hung, Huang, Yuan-Hao

    ISSN: 1053-587X, 1941-0476
    Vydáno: New York IEEE 15.01.2015
    “… Furthermore, the link performance can be improved by adopting precoding technology in multiple data stream transmission…”
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    Journal Article
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    AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads Autor Zhang, Chi, Scheffler, Paul, Benz, Thomas, Perotti, Matteo, Benini, Luca

    ISSN: 1558-1101
    Vydáno: EDAA 01.04.2023
    “…Data-intensive applications involving irregular memory streams are inefficiently handled by modern processors and memory systems highly optimized for regular, contiguous data…”
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    Konferenční příspěvek
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    Scalable processor core for high-speed pattern matching architecture on FPGA Autor Alyushin, A. V., Alyushin, S. A., Arkhangelsky, V. G.

    Vydáno: IEEE 01.07.2016
    “… We suggest scalable processor core with heterogeneous cluster architecture. Experimental results show that the proposed architecture has advantages over the previously…”
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    OPSILA: a vector and parallel processor Autor Boeri, F., Auguin, M.

    ISSN: 0018-9340
    Vydáno: New York, NY IEEE 01.01.1993
    Vydáno v IEEE transactions on computers (01.01.1993)
    “… The operating modes are the vector single-instruction multiple-data (SIMD) mode and the parallel single program stream, multiple data stream (SPMD) mode…”
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    Journal Article
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    IP core implementation of a self-organizing neural network Autor Hendry, D.C., Duncan, A.A., Lightowler, N.

    ISSN: 1045-9227
    Vydáno: United States IEEE 01.09.2003
    Vydáno v IEEE transactions on neural networks (01.09.2003)
    “… Thus, the number of neurons within the single instruction multiple data (SIMD) array, the number of elements per reference vector, and the number of bits of each such element…”
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    Journal Article
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    COMBINING BACKGROUND MEMORY MANAGEMENT AND REGULAR ARRAY CO-PARTITIONING, ILLUSTRATED ON A FULL MOTION ESTIMATION KERNEL Autor SCHAFFER, RAINER, CATTHOOR, FRANCKY, MERKER, RENATE

    ISSN: 1063-7192
    Vydáno: Taylor & Francis Group 01.12.2000
    Vydáno v Parallel algorithms and applications (01.12.2000)
    “…In this paper an approach is presented to combine the design of background memory architectures and processor arrays for data dominated real-time applications…”
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    Journal Article
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    A survey of synchronization methods for parallel computers Autor Dinning, A.

    ISSN: 0018-9162, 1558-0814
    Vydáno: United States IEEE 01.07.1989
    Vydáno v Computer (Long Beach, Calif.) (01.07.1989)
    “… (multiple-instruction multiple-data-stream) multiprocessors. She provides an overview of MIMD multiprocessing and goes on to discuss semaphore-based implementations…”
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    Journal Article
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    Synchronizing a high-speed SIMD processor array Autor Lund, S., Bengtsson, L.

    ISBN: 0769512399, 9780769512396
    Vydáno: IEEE 2001
    “…A synchronization method for a high speed scalable SIMD (Single instruction stream Multiple Data stream…”
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    Reconfigurable Stream-based Tensor Unit with Variable-Precision Posit Arithmetic Autor Neves, Nuno, Tomas, Pedro, Roma, Nuno

    ISSN: 2160-052X
    Vydáno: IEEE 01.07.2020
    “…). In contrast, this paper proposes a new Reconfigurable Tensor Unit (RTU) which deploys an array of variable-precision Vector MultiplyAccumulate (VMA) units…”
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    Computing the Hough transform on a scan line array processor (image processing) Autor Fisher, A.L., Highnam, P.T.

    ISSN: 0162-8828
    Vydáno: Los Alamitos, CA IEEE 01.03.1989
    “… (single-instruction, multiple-data-stream) vector of processors is described. The authors show that a high-precision transform, usually considered to be an…”
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    Journal Article
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    Coherent spatio-temporal sensor fusion on a hybrid multicore processor system Autor Kotas, C., Ponce, E., Williams, H., Barhen, J.

    ISBN: 1467304174, 9781467304177
    Vydáno: IEEE 01.07.2012
    “… This scheme involves coherent spatio-temporal fusion of data streams from multiple sensors, leading to the derivation of LLR detection statistics…”
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    Performance Study of SIMD Programming Models on Intel Multicore Processors Autor Kristof, P., Hongtao Yu, Zhiyuan Li, Xinmin Tian

    ISBN: 1467309745, 9781467309745
    Vydáno: IEEE 01.05.2012
    “…Modern multicore hardware employs a variety of parallel execution units, including multiple CPU cores for executing multiple threads simultaneously, vector units such as the Intel SIMD on the CPU…”
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    Efficient parallel algorithms and VLSI architectures for manipulator Jacobian computation Autor Yeung, T.B., Lee, C.S.G.

    ISSN: 0018-9472, 2168-2909
    Vydáno: New York, NY IEEE 01.09.1989
    “…) on uniprocessor computers and of order O(log/sub 2/ N) on both single-instruction-stream-multiple-data-stream (SIMD…”
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    General-purpose systolic arrays Autor Johnson, K.T., Hurson, A.R., Shirazi, B.

    ISSN: 0018-9162
    Vydáno: IEEE 01.11.1993
    Vydáno v Computer (Long Beach, Calif.) (01.11.1993)
    “… (single-instruction stream, multiple-data stream), MIMD (multiple-instruction stream, multiple-data stream…”
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    Journal Article
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    Selective Search Architectures and Brute Force Scan Techniques for Summarizing Social Media Posts Autor Wang, Yulu

    ISBN: 9780438136618, 0438136616
    Vydáno: ProQuest Dissertations & Theses 01.01.2018
    “… However, the nature of social posts presents challenges for existing search functions. Firstly, as a stream of documents is constantly arriving at a high speed…”
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    Dissertation
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    Performance of cached DRAM organizations in vector supercomputers Autor Hsu, W.-C., Smith, J. E.

    ISBN: 0818638109, 9780818638107
    Vydáno: New York, NY, USA ACM 01.05.1993
    “… In particular, we consider systems where processors have no internal data caches and memory reference streams are generated by vector instructions…”
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    Automatic Parallelization of Loops with Data Dependent Control Flow and Array Access Patterns Autor Ravishankar, Mahesh

    ISBN: 9781369488654, 1369488653
    Vydáno: ProQuest Dissertations & Theses 01.01.2014
    “…With the era of increasing clock speeds coming to an end, parallel computing architectures have now become main-stream…”
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    Dissertation
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    A vector memory system based on wafer-scale integrated memory arrays Autor Chiueh, T.-C.

    ISBN: 0818642300, 9780818642302
    Vydáno: IEEE Comput. Soc. Press 1993
    “… Using WIMA modules as the basic building blocks, a high-bandwidth, low latency, and low cost vector memory system is developed that supports parallelism among multiple vector access streams…”
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    Supercomputers: Influencing Tomorrow's General-Purpose Hardware Autor Gitomer, Jerry

    ISSN: 0739-9014
    Vydáno: Taylor & Francis Group 1986
    “…By studying state-of-the-art supercomputers, MIS managers can estimate the state of the typical commercial data processing installation five to ten years from now…”
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