Výsledky vyhledávání - Computer system organization Architectures Other architectural Reconfigurable computing

NAAS: Neural Accelerator Architecture Search Autor Lin, Yujun, Yang, Mengtian, Han, Song

“…Data-driven, automatic design space exploration of neural accelerator architecture is desirable for specialization and productivity…”
Získat plný text

Programming dynamic reconfigurable systems Autor El Ballouli, Rim, Bensalem, Saddek, Bozga, Marius, Sifakis, Joseph

“… It relies on architectural motifs to structure the architecture of a system and to coordinate its reconfiguration at runtime…”
Získat plný text

RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU Autor Jeong, Geonhwa, Qin, Eric, Samajdar, Ananda, Hughes, Christopher J., Subramoney, Sreenivas, Kim, Hyesoon, Krishna, Tushar

“… Systolic arrays have been the premier architectural choice as matrix engines in offload accelerators…”
Získat plný text

InfScaler: Enabling Efficient ML Inference Serving on Multi-Accelerator Edge Devices via Asymmetric Auto-Scaling Autor Li, Borui, Xia, Tiange, Wang, Shuai, Wang, Shuai

“… However, we observe that existing ML inference serving frameworks are poor in utilizing the unique hardware architecture of these edge devices…”
Získat plný text

Understanding and optimizing asynchronous low-precision stochastic gradient descent Autor De Sa, Christopher, Feldman, Matthew, Re, Christopher, Olukotun, Kunle

“…Stochastic gradient descent (SGD) is one of the most popular numerical algorithms used in machine learning and other domains. Since this is likely to continue…”
Získat plný text

AIO: An Abstraction for Performance Analysis Across Diverse Accelerator Architectures Autor Rogers, Joseph, Soliman, Taha, Jahre, Magnus

“… the productivity of software developers, system software designers, and computer architects - to ensure that they focus time-consuming implementation and optimization efforts on the most favorable class of accelerators for the problem at hand…”
Získat plný text

LLMCompass: Enabling Efficient Hardware Design for Large Language Model Inference Autor Zhang, Hengrui, Ning, August, Prabhakar, Rohan Baskar, Wentzlaff, David

“…The past year has witnessed the increasing popularity of Large Language Models (LLMs). Their unprecedented scale and associated high hardware cost have impeded…”
Získat plný text

Late Breaking Results: FPGen-3D: Automated Framework for 3D-FPGA Architecture Generation and Exploration Autor Youssef, Ismael, Hao, Cong Callie

“…) architecture generation and exploration. FPGen-3D generates custom 3D FPGA fabrics based on user-defined architectural parameters, producing synthesizable register-transfer level (RTL…”
Získat plný text

Multithreading on reconfigurable hardware: An architectural approach Autor Zaykov, Pavel G., Kuzmanov, Georgi

“… Our proposal to improve overall system performance is twofold. First, we provide architectural mechanisms to accelerate applications by supporting computationally intensive kernels with reconfigurable hardware accelerators…”
Získat plný text

Architectural performance analysis of FPGA synthesized LEON processors Autor Damman, Corentin, Edison, Gregory, Guet, Fabrice, Noulard, Eric, Santinelli, Luca, Hugues, Jerome

“… Benchmarking exposes key parameters to execution time variability allowing for accurate probabilistic modeling of system dynamics…”
Získat plný text

Understanding and Optimizing Asynchronous Low-Precision Stochastic Gradient Descent Autor De Sa, Christopher, Feldman, Matthew, Ré, Christopher, Olukotun, Kunle

“…Stochastic gradient descent (SGD) is one of the most popular numerical algorithms used in machine learning and other domains. Since this is likely to continue…”
Získat plný text

Reconfigurable-computing technology Autor Palagin, A. V., Opanasenko, V. N.

“…Evolution of computers with flexible architecture is considered. Distinctive features of the architectural and structural organization of reconfigurable computer systems (RCSs) are described…”
Získat plný text

SyFAxO-GeN: Synthesizing FPGA-Based Approximate Operators with Generative Networks Autor Ranjan, Rohit, Ullah, Salim, Sahoo, Siva Satyendra, Kumar, Akash

“… Given the diversity of application areas at the edge, FPGA-based systems are increasingly used for high-performance inference…”
Získat plný text

FATE: Fast and Accurate Timing Error Prediction Framework for Low Power DNN Accelerator Design Autor Zhang, Jeff, Garg, Siddharth

“… Architectural exploration for timing speculation requires detailed gate-level timing simulations that can be time-consuming for large DNNs which execute millions of multiply-and-accumulate (MAC) operations…”
Získat plný text

AESHA: Accelerating Eigen-Decomposition-Based Sparse Transformer with Hybrid RRAM-SRAM Architecture Autor Yu, Xuliang, Ni, Tianwei, Sheng, Xinsong, Pan, Yun, He, Lei, Zhao, Liang

“…Compute-in-memory (CIM) architectures based on emerging nonvolatile memories (eNVM) are recognized as promising candidates for the efficient computation of self…”
Získat plný text

A runtime support mechanism for fast mode switching of a self-morphing core for power efficiency Autor Srinivasan, Sudarshan, Kurella, Nithesh, Koren, Israel, Kundu, Sandip, Rodrigues, Rance

“…Asymmetric multicore processors (AMPs) consist of cores executing the same ISA, but differing in microarchitectural resources, performance, and power…”
Získat plný text

Reconfigurable caches and their application to media processing Autor Ranganathan, Parthasarathy, Adve, Sarita, Jouppi, Norman P.

“… It is therefore important to ensure that architectural features that use a significant fraction of the on-chip transistors are applicable across these different domains…”
Získat plný text

Using a configurable processor generator for computer architecture prototyping Autor Solomatnikov, Alex, Firoozshahian, Amin, Shacham, Ofer, Asgar, Zain, Wachs, Megan, Qadeer, Wajahat, Richardson, Stephen, Horowitz, Mark

“…Building hardware prototypes for computer architecture research is challenging. Unfortunately, development of the required software tools…”
Získat plný text

Modeling of a Reconfigurable OFDM IP Block Family For an RF System Simulator Autor Heusala, Hannu, Liedes, Jussi

“…The idea of design domain specific Mother Model of IP block family as a base of modeling of system integration is presented here…”
Získat plný text

Performance of reconfigurable architectures for image-processing applications Autor Benitez, Domingo

“… The goal of this work is to explore the architectural behaviour of remote reconfigurable systems that are part of general-purpose computers…”
Získat plný text