Search Results - Iterative decoding algorithms

Application-Specific Hardware Architecture Design with VHDL by Belean, Bogdan

Table of Contents: “…Introduction to VHDL -- High Throughput Hardware Architecture for LDPC decoders -- Hardware Architecture for Hamming Codes -- Hardware Architecture for Edge Detection -- Hardware architectures for iterative algorithm implementations -- Content addressable memories (CAM) for search algorithms optimization.…”

Principles of Spread-Spectrum Communication Systems by Torrieri, Don