Logic Synthesis for Finite State Machines Based on Linear Chains of States Foundations, Recent Developments and Challenges /
This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state c...
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| Format: | Elektronisch E-Book |
| Sprache: | Englisch |
| Veröffentlicht: |
Cham :
Springer International Publishing,
2018.
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| Ausgabe: | 1st ed. 2018. |
| Schriftenreihe: | Studies in Systems, Decision and Control,
113 |
| Schlagworte: | |
| ISBN: | 9783319598376 |
| ISSN: | 2198-4182 ; |
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| 024 | 7 | |a 10.1007/978-3-319-59837-6 |2 doi | |
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| 100 | 1 | |a Barkalov, Alexander. |4 aut | |
| 245 | 1 | 0 | |a Logic Synthesis for Finite State Machines Based on Linear Chains of States |h [electronic resource] : |b Foundations, Recent Developments and Challenges / |c by Alexander Barkalov, Larysa Titarenko, Jacek Bieganowski. |
| 250 | |a 1st ed. 2018. | ||
| 260 | 1 | |a Cham : |b Springer International Publishing, |c 2018. | |
| 300 | |a VIII, 225 p. 145 illus. |b online resource. | ||
| 490 | 1 | |a Studies in Systems, Decision and Control, |x 2198-4182 ; |v 113 | |
| 500 | |a Engineering | ||
| 505 | 0 | |a Introduction -- Finite state machines and field-programmable gate arrays -- Linear chains in FSMs -- Hardware reduction for Moore UFSMs -- Hardware reduction for Mealy UFSMs -- Hardware reduction for Moore NFSMs -- Hardware reduction for Moore XFSMs. | |
| 516 | |a text file PDF | ||
| 520 | |a This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation. This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units. | ||
| 650 | 0 | |a Computational intelligence. | |
| 650 | 0 | |a Electronic circuits. | |
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