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Title: [Untitled]
Contributors: The Pennsylvania State University CiteSeerX Archives
Source: http://hal.inria.fr/docs/00/71/73/25/PDF/ICCE11_v0.7c.pdf.
Collection: CiteSeerX
Description: —In this paper, the implementation of a DSP based video decoder compliant with the H.264/SVC standard (14496-10 Annex G) is presented. A PC-based decoder implementation has been ported to a commercial DSP. Performance optimizations have been carried out improving the initial version performance about 32 % and reaching real time for CIF sequences. Moreover, conformance tests have been done using different H.264/SVC streams. This decoder will be the core of a multimedia terminal that will trade off energy against quality of experience. I.
Document Type: text
File Description: application/pdf
Language: English
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.593.7680; http://hal.inria.fr/docs/00/71/73/25/PDF/ICCE11_v0.7c.pdf
Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.593.7680
http://hal.inria.fr/docs/00/71/73/25/PDF/ICCE11_v0.7c.pdf
Rights: Metadata may be used without restrictions as long as the oai identifier remains attached to it.
Accession Number: edsbas.A52B1FFC
Database: BASE
Description
Abstract:—In this paper, the implementation of a DSP based video decoder compliant with the H.264/SVC standard (14496-10 Annex G) is presented. A PC-based decoder implementation has been ported to a commercial DSP. Performance optimizations have been carried out improving the initial version performance about 32 % and reaching real time for CIF sequences. Moreover, conformance tests have been done using different H.264/SVC streams. This decoder will be the core of a multimedia terminal that will trade off energy against quality of experience. I.