TRACE LENGTH CALCULATION ON PCBS
Saved in:
| Title: | TRACE LENGTH CALCULATION ON PCBS |
|---|---|
| Authors: | Shlaghya S Vasista |
| Publisher Information: | Zenodo |
| Publication Year: | 2023 |
| Collection: | Zenodo |
| Subject Terms: | Trace length calculation, Board design, SKILL script, python script |
| Description: | The design of silicon chips in every semiconductor industry involves the testing of these chips with other components on the board. The platform developed acts as power on vehicle for the silicon chips. This Printed Circuit Board design that serves as a validation platform is foundational to the semiconductor industry. The manual/repetitive design activities that accompany the development of this board must be minimized to achieve high quality, improve design efficiency, and eliminate human-errors. One of the time consuming tasks in the board design is the Trace Length matching. The paper aims to reduce the length matching time by automating it using SKILL scripts. |
| Document Type: | article in journal/newspaper |
| Language: | unknown |
| Relation: | https://zenodo.org/records/8120748; oai:zenodo.org:8120748; https://doi.org/10.5281/zenodo.8120748 |
| DOI: | 10.5281/zenodo.8120748 |
| Availability: | https://doi.org/10.5281/zenodo.8120748 https://zenodo.org/records/8120748 |
| Rights: | Creative Commons Attribution 4.0 International ; cc-by-4.0 ; https://creativecommons.org/licenses/by/4.0/legalcode |
| Accession Number: | edsbas.9D3F9504 |
| Database: | BASE |
| FullText | Text: Availability: 0 CustomLinks: – Url: https://doi.org/10.5281/zenodo.8120748# Name: EDS - BASE (s4221598) Category: fullText Text: View record from BASE – Url: https://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=EBSCO&SrcAuth=EBSCO&DestApp=WOS&ServiceName=TransferToWoS&DestLinkType=GeneralSearchSummary&Func=Links&author=Vasista%20SS Name: ISI Category: fullText Text: Nájsť tento článok vo Web of Science Icon: https://imagesrvr.epnet.com/ls/20docs.gif MouseOverText: Nájsť tento článok vo Web of Science |
|---|---|
| Header | DbId: edsbas DbLabel: BASE An: edsbas.9D3F9504 RelevancyScore: 939 AccessLevel: 3 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 938.929138183594 |
| IllustrationInfo | |
| Items | – Name: Title Label: Title Group: Ti Data: TRACE LENGTH CALCULATION ON PCBS – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Shlaghya+S+Vasista%22">Shlaghya S Vasista</searchLink> – Name: Publisher Label: Publisher Information Group: PubInfo Data: Zenodo – Name: DatePubCY Label: Publication Year Group: Date Data: 2023 – Name: Subset Label: Collection Group: HoldingsInfo Data: Zenodo – Name: Subject Label: Subject Terms Group: Su Data: <searchLink fieldCode="DE" term="%22Trace+length+calculation%22">Trace length calculation</searchLink><br /><searchLink fieldCode="DE" term="%22Board+design%22">Board design</searchLink><br /><searchLink fieldCode="DE" term="%22SKILL+script%22">SKILL script</searchLink><br /><searchLink fieldCode="DE" term="%22python+script%22">python script</searchLink> – Name: Abstract Label: Description Group: Ab Data: The design of silicon chips in every semiconductor industry involves the testing of these chips with other components on the board. The platform developed acts as power on vehicle for the silicon chips. This Printed Circuit Board design that serves as a validation platform is foundational to the semiconductor industry. The manual/repetitive design activities that accompany the development of this board must be minimized to achieve high quality, improve design efficiency, and eliminate human-errors. One of the time consuming tasks in the board design is the Trace Length matching. The paper aims to reduce the length matching time by automating it using SKILL scripts. – Name: TypeDocument Label: Document Type Group: TypDoc Data: article in journal/newspaper – Name: Language Label: Language Group: Lang Data: unknown – Name: NoteTitleSource Label: Relation Group: SrcInfo Data: https://zenodo.org/records/8120748; oai:zenodo.org:8120748; https://doi.org/10.5281/zenodo.8120748 – Name: DOI Label: DOI Group: ID Data: 10.5281/zenodo.8120748 – Name: URL Label: Availability Group: URL Data: https://doi.org/10.5281/zenodo.8120748<br />https://zenodo.org/records/8120748 – Name: Copyright Label: Rights Group: Cpyrght Data: Creative Commons Attribution 4.0 International ; cc-by-4.0 ; https://creativecommons.org/licenses/by/4.0/legalcode – Name: AN Label: Accession Number Group: ID Data: edsbas.9D3F9504 |
| PLink | https://erproxy.cvtisr.sk/sfx/access?url=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=edsbas&AN=edsbas.9D3F9504 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.5281/zenodo.8120748 Languages: – Text: unknown Subjects: – SubjectFull: Trace length calculation Type: general – SubjectFull: Board design Type: general – SubjectFull: SKILL script Type: general – SubjectFull: python script Type: general Titles: – TitleFull: TRACE LENGTH CALCULATION ON PCBS Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Shlaghya S Vasista IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 01 Type: published Y: 2023 Identifiers: – Type: issn-locals Value: edsbas – Type: issn-locals Value: edsbas.oa |
| ResultId | 1 |
Nájsť tento článok vo Web of Science