Software Transactional Memory: A Comprehensive Review of Design, Challenges, Applications, and Future Prospects
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| Title: | Software Transactional Memory: A Comprehensive Review of Design, Challenges, Applications, and Future Prospects |
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| Authors: | Meenu |
| Source: | International Journal of Intelligent Systems and Applications in Engineering; Vol. 12 No. 4 (2024); 5302-5311 |
| Publisher Information: | International Journal of Intelligent Systems and Applications in Engineering, 2024. |
| Publication Year: | 2024 |
| Subject Terms: | Concurrency Control, Nested Transactions, Parallel Programming, Software Transactional Memory (STM), Transactional Memory Models |
| Description: | This paper provides a comprehensive review of Software Transactional Memory (STM) systems, emphasizing their evolution, design, challenges, and applications. STM has emerged as a key solution for managing concurrency in modern software, offering a flexible alternative to traditional synchronization methods. The study traces the evolution of Transactional Memory models, including Hardware (HTM), Software (STM), and Hybrid (HyTM), comparing their features, benefits, and limitations. It explores crucial design elements affecting STM’s performance, such as contention management, concurrency control, and memory overhead, while addressing the complexities of nested transactions and ensuring global consistency. The paper highlights STM's versatility, showcasing applications in diverse domains that benefit from its ability to enable scalable and high-performance parallel programming. It also examines challenges such as scalability, optimization, and integration with existing systems, presenting opportunities for future research. Proposed directions include improving STM’s efficiency, scalability, and adoption in real-world scenarios. By summarizing the advancements and limitations of STM, this study underscores its role as a powerful tool for enhancing concurrency control in parallel computing. It serves as a valuable resource for researchers and practitioners aiming to optimize software systems through improved concurrency mechanisms. |
| Document Type: | Article |
| File Description: | application/pdf |
| Language: | English |
| ISSN: | 2147-6799 |
| Access URL: | https://www.ijisae.org/index.php/IJISAE/article/view/7323 |
| Rights: | CC BY SA |
| Accession Number: | edsair.issn21476799..0aa6151379b1490fd026a1b1d013a3c6 |
| Database: | OpenAIRE |
Nájsť tento článok vo Web of Science | Abstract: | This paper provides a comprehensive review of Software Transactional Memory (STM) systems, emphasizing their evolution, design, challenges, and applications. STM has emerged as a key solution for managing concurrency in modern software, offering a flexible alternative to traditional synchronization methods. The study traces the evolution of Transactional Memory models, including Hardware (HTM), Software (STM), and Hybrid (HyTM), comparing their features, benefits, and limitations. It explores crucial design elements affecting STM’s performance, such as contention management, concurrency control, and memory overhead, while addressing the complexities of nested transactions and ensuring global consistency. The paper highlights STM's versatility, showcasing applications in diverse domains that benefit from its ability to enable scalable and high-performance parallel programming. It also examines challenges such as scalability, optimization, and integration with existing systems, presenting opportunities for future research. Proposed directions include improving STM’s efficiency, scalability, and adoption in real-world scenarios. By summarizing the advancements and limitations of STM, this study underscores its role as a powerful tool for enhancing concurrency control in parallel computing. It serves as a valuable resource for researchers and practitioners aiming to optimize software systems through improved concurrency mechanisms. |
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| ISSN: | 21476799 |