Lai, S., Wang, S., Morsalin, S. M. S., Lin, J., Hsia, S., Chang, C., & Sheu, M. (2025). VLSI Architecture Design for Compact Shortcut Denoising Autoencoder Neural Network of ECG Signal. IEEE Transactions on Circuits and Systems I: Regular Papers, 72, 1621-1633. https://doi.org/10.1109/tcsi.2025.3533544
Citácia podle Chicago (17th ed.)Lai, Shin-Chi, Szu-Ting Wang, S. M. Salahuddin Morsalin, Jia-He Lin, Shih-Chang Hsia, Chuan-Yu Chang, a Ming-Hwa Sheu. "VLSI Architecture Design for Compact Shortcut Denoising Autoencoder Neural Network of ECG Signal." IEEE Transactions on Circuits and Systems I: Regular Papers 72 (2025): 1621-1633. https://doi.org/10.1109/tcsi.2025.3533544.
Citácia podľa MLA (8th ed.)Lai, Shin-Chi, et al. "VLSI Architecture Design for Compact Shortcut Denoising Autoencoder Neural Network of ECG Signal." IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 72, 2025, pp. 1621-1633, https://doi.org/10.1109/tcsi.2025.3533544.