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Epitaxial growth of up to 120× {Si0.8Ge0.2/Si} bilayers in view of three dimensional dynamic random access memory applications.

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Title: Epitaxial growth of up to 120× {Si0.8Ge0.2/Si} bilayers in view of three dimensional dynamic random access memory applications.
Authors: Loo, R., Beggiato, M., Shimura, Y., Rassoul, N., Vanherle, W., Seidel, F., Paulussen, K., Merkulov, A., Ayyad, M., Lee, I., Belmonte, A., Langer, R.
Source: Journal of Applied Physics; 8/7/2025, Vol. 138 Issue 5, p1-13, 13p
Subject Terms: DYNAMIC random access memory, EPITAXY, MATERIALS science, SEMICONDUCTOR materials, MECHANICAL behavior of materials, DISLOCATION structure, ETCHING reagents, INTERFACE stability
Abstract: Epitaxially grown Si/Si1−xGex multi-stacks with ≥100 bilayers (≥200 sublayers) are being considered for three dimensionally vertically stacked dynamic random access memory devices. Because of the lattice mismatch between Si1−xGex and Si, the high total layer thickness, and the need for sharp interfaces, it is challenging to develop a low cost epitaxial growth process. This work describes the material characteristics of multi-stacks containing up to 120 pairs (241 sub-layers) of {65 nm Si/10 nm Si0.8Ge0.2} epitaxially grown on 300 mm Si wafers, with fully strained layer stacks at the inner part of the wafers. This Ge concentration allows a high etching selectivity during selective lateral Si0.8Ge0.2 removal later in the device fabrication. However, misfit dislocations are formed near the rim of the wafer, as the wafer edge lowers the energy barrier to form misfit locations. The drive for layer relaxation is reduced by reducing the lattice mismatch between Si and Si1−xGex. This can be done either by adding carbon into the Si1−xGex or by reducing the Ge concentration in the Si1−xGex layers. It will also be discussed how deposition on the reactor quartz tube might affect the temperature of the growing surface, leading to drifts in both layer-to-layer and within-wafer uniformities, and how these issues can be mitigated. [ABSTRACT FROM AUTHOR]
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Abstract:Epitaxially grown Si/Si<subscript>1−x</subscript>Ge<subscript>x</subscript> multi-stacks with ≥100 bilayers (≥200 sublayers) are being considered for three dimensionally vertically stacked dynamic random access memory devices. Because of the lattice mismatch between Si<subscript>1−x</subscript>Ge<subscript>x</subscript> and Si, the high total layer thickness, and the need for sharp interfaces, it is challenging to develop a low cost epitaxial growth process. This work describes the material characteristics of multi-stacks containing up to 120 pairs (241 sub-layers) of {65 nm Si/10 nm Si<subscript>0.8</subscript>Ge<subscript>0.2</subscript>} epitaxially grown on 300 mm Si wafers, with fully strained layer stacks at the inner part of the wafers. This Ge concentration allows a high etching selectivity during selective lateral Si<subscript>0.8</subscript>Ge<subscript>0.2</subscript> removal later in the device fabrication. However, misfit dislocations are formed near the rim of the wafer, as the wafer edge lowers the energy barrier to form misfit locations. The drive for layer relaxation is reduced by reducing the lattice mismatch between Si and Si<subscript>1−x</subscript>Ge<subscript>x</subscript>. This can be done either by adding carbon into the Si<subscript>1−x</subscript>Ge<subscript>x</subscript> or by reducing the Ge concentration in the Si<subscript>1−x</subscript>Ge<subscript>x</subscript> layers. It will also be discussed how deposition on the reactor quartz tube might affect the temperature of the growing surface, leading to drifts in both layer-to-layer and within-wafer uniformities, and how these issues can be mitigated. [ABSTRACT FROM AUTHOR]
ISSN:00218979
DOI:10.1063/5.0260979