WIP: An Interdisciplinary Subject on Hardware Accelerated Computing.
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| Název: | WIP: An Interdisciplinary Subject on Hardware Accelerated Computing. |
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| Autoři: | Bradford, Glenn J., Buskes, Gavin, Beuchat, Paul N. |
| Zdroj: | Proceedings of the ASEE Annual Conference & Exposition; 2024, p1-12, 12p |
| Abstrakt: | In this paper we report on the initial design and delivery of a hardware accelerated computing subject targeted at an interdisciplinary cohort of engineering and computing students. Within the subject, students explore different approaches to accelerating computationally intensive algorithms through customized hardware, with a particular emphasis placed on the use of FPGAs and high-level synthesis (HLS) tools. The subject aims necessitate covering aspects from a diverse range of topics, including fundamentals of digital design, computer architecture, parallel programming, and systems thinking. Although such concepts naturally intersect within the discipline of computer engineering, structural considerations within our master's programs and disparate prior knowledge within our cohort entail students inherently experience the subject as interdisciplinary in nature. This presents numerous challenges in subject design but offers an opportunity for developing interdisciplinary competencies and an appreciation for other disciplinary ways of thinking. Based on instructor observations while teaching, we reflect on the successes and shortcomings in the subject's design that impact interdisciplinary knowledge development. We then conclude with proposed revisions to address identified shortcomings. [ABSTRACT FROM AUTHOR] |
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| Databáze: | Complementary Index |
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