Xu, C., Yu, H., Xi, W., Zhu, J., Chen, C., & Jiang, X. (2023). A Polynomial Multiplication Accelerator for Faster Lattice Cipher Algorithm in Security Chip. Electronics (2079-9292), 12(4), 951-971. https://doi.org/10.3390/electronics12040951
Chicago-Zitierstil (17. Ausg.)Xu, Changbao, Hongzhou Yu, Wei Xi, Jianyang Zhu, Chen Chen, und Xiaowen Jiang. "A Polynomial Multiplication Accelerator for Faster Lattice Cipher Algorithm in Security Chip." Electronics (2079-9292) 12, no. 4 (2023): 951-971. https://doi.org/10.3390/electronics12040951.
MLA-Zitierstil (9. Ausg.)Xu, Changbao, et al. "A Polynomial Multiplication Accelerator for Faster Lattice Cipher Algorithm in Security Chip." Electronics (2079-9292), vol. 12, no. 4, 2023, pp. 951-971, https://doi.org/10.3390/electronics12040951.