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VLIW 处理器的变长指令跨边界派发窗设计.

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Titel: VLIW 处理器的变长指令跨边界派发窗设计.
Alternate Title: Design of Variable-length Instruction Cross-boundary Dispatch Window for VLIW Processors.
Autoren: 王东旭1 electricwangdx@163.com, 汪 东1,2, 万江华1,2
Quelle: Telecommunication Engineering. 12/28/2024, Vol. 64 Issue 12, p2038-2043. 6p.
Schlagwörter: *PARALLEL processing, *PROBLEM solving, *SIMULATION methods & models, *SCHEDULING, INTEGERS
Abstract (English): In order to solve the problem that the increase of code size of the traditional very long instruction word (VLIW) processor will significantly reduce the performance of the processor, a new eight-flow variable-length instruction cross-boundary dispatch window is designed. The dispatch window is compatible with compression instruction technology, and supports the mixed dispatch of compression instructions and integer instructions, which effectively compresses the size of processor code. At the same time, the dispatch window introduces a cross-boundary dispatch mechanism for instructions to further expel useless bubbles between instructions. By building a dispatch window simulation model and simulating it based on the DSP / VoLIB library, the results show that the new variable-length instruction cross-boundary dispatch window can give full play to the advantages of instruction-level parallelism. After compiler scheduling optimization, the size of typical programs in the library is reduced by about 19. 26% on average compared with that of the traditional dispatch window, and the processor performance is improved by about 15. 4% . [ABSTRACT FROM AUTHOR]
Abstract (Chinese): 针对传统超长指令字(Very Long Instruction Word, VLIW)处理器代码体积增大会显著降低处 理器性能的问题, 设计了一种八流出新型变长指令跨边界派发窗。 该派发窗兼容压缩指令派发功 能, 支持压缩指令和整字指令混合派发, 有效减小了处理器代码体积。 同时该派发窗引入指令跨边 界派发机制, 进一步排出指令间无用气泡。 通过搭建派发窗仿真模型, 并基于 DSP / VoLIB 库进行仿 真, 结果显示, 采用新型变长指令跨边界派发窗能够充分发挥指令级并行优势。 经编译器调度优化 后, 库中典型程序体积比传统派发窗平均降低约 19. 26%, 处理器性能提升约 15. 4% 。 [ABSTRACT FROM AUTHOR]
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Datenbank: Business Source Index
Beschreibung
Abstract:In order to solve the problem that the increase of code size of the traditional very long instruction word (VLIW) processor will significantly reduce the performance of the processor, a new eight-flow variable-length instruction cross-boundary dispatch window is designed. The dispatch window is compatible with compression instruction technology, and supports the mixed dispatch of compression instructions and integer instructions, which effectively compresses the size of processor code. At the same time, the dispatch window introduces a cross-boundary dispatch mechanism for instructions to further expel useless bubbles between instructions. By building a dispatch window simulation model and simulating it based on the DSP / VoLIB library, the results show that the new variable-length instruction cross-boundary dispatch window can give full play to the advantages of instruction-level parallelism. After compiler scheduling optimization, the size of typical programs in the library is reduced by about 19. 26% on average compared with that of the traditional dispatch window, and the processor performance is improved by about 15. 4% . [ABSTRACT FROM AUTHOR]
ISSN:1001893X
DOI:10.20079/j.issn.1001-893x.231030003