Suchergebnisse - types AND design style—(gate OR game) arrays general terms algorithms~
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Quelle: Technologies (2227-7080); Aug2025, Vol. 13 Issue 8, p321, 15p
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Autoren: et al.
Quelle: Sensors (14248220); Dec2023, Vol. 23 Issue 23, p9495, 21p
Schlagwörter: EDGE computing, ARTIFICIAL intelligence, PROCESS capability, INTERNET of things, ALGORITHMS
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Quelle: Proceedings of the Annual Meeting of the United States Animal Health Association. 10/10/2024, Vol. 128, p1-339. 336p.
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Autoren: et al.
Weitere Verfasser: et al.
Schlagwörter: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Style—Gate arrays, B.7.2 [Integrated Circuits, Design Aids—Placement and routing. General Terms Performance, Experimentation Keywords FPGAs, FPGA placement, timing-driven placement, partitioning based
Dateibeschreibung: application/pdf
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Quelle: Veterinary Evidence. Jul-Sep2025, Vol. 10 Issue 3, p1-31. 31p.
Schlagworte: Veterinary medicine, Ethics, Biology, Pragmatism, Worldview, Practice of veterinary medicine, Historical source material
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Autoren: et al.
Quelle: Veterinary Sciences. Dec2024, Vol. 11 Issue 12, p627. 30p.
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Quelle: Veterinary Sciences. Sep2023, Vol. 10 Issue 9, p537. 25p.
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Autoren: et al.
Quelle: Journal of Animal Ecology. Jul2024, Vol. 93 Issue 7, p876-890. 15p.
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Autoren: et al.
Weitere Verfasser: et al.
Quelle: http://www.sigda.org/Archives/ProceedingArchives/Dac/Dac2003/papers/2003/dac03/pdffiles/35_1.pdf.
Schlagwörter: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Style—Gate arrays, B.7.2 [Integrated Circuits, Design Aids—Placement and routing. General Terms Performance, Experimentation Keywords FPGAs, FPGA placement, timing-driven placement, partitioning based
Dateibeschreibung: application/pdf
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.97.2808; http://www.sigda.org/Archives/ProceedingArchives/Dac/Dac2003/papers/2003/dac03/pdffiles/35_1.pdf
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Weitere Verfasser:
Schlagwörter: Categories and Subject Descriptors, A.1 [Introductory and Survey, B.6.1 [Logic Design, Design Style—logic arrays, B.6.3 [Logic Design, Design Aids, B.7.1 [Integrated Circuits, Types and Design Styles—gate arrays General Terms, Design, Performance Additional Key Words and Phrases, Automatic design, field-programmable, FPGA, manual design
Dateibeschreibung: application/pdf
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.476.7584; http://www.idi.ntnu.no/emner/tdt22/2011/reconfig.pdf
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Autoren: et al.
Weitere Verfasser: et al.
Schlagwörter: Categories and Subject Descriptors D.3.4 [Compilers, Parallelizing Compilers, B.5.2 [Designs Aids, Automatic Synthesis, D.7.1 [Types and Design Styles, Algorithms implemented in hardware, Gate Arrays General Terms Algorithms, Performance, Design, Experimentation Keywords Design Space Exploration, Data Dependence Analysis, Reuse Analysis, Loop Transformations
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.89.1833; http://www.ece.ucsb.edu/~kastner/ece253/reader/so02.pdf
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Autoren: et al.
Weitere Verfasser: et al.
Schlagwörter: Categories and Subject Descriptors B.6.3 [Logic Design, Design Aids – Optimization, B.7.1 [Integrated Circuits, Types and Design Styles – Gate arrays General Terms Algorithms, Performance, Design, Experimentation Keywords FPGA, Technology Mapping, Cut Enumeration, Area Flow, Edge Flow
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.299.5175; http://www.eecs.berkeley.edu/~alanmi/publications/2008/fpga08_wmap.pdf
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Disgust in animals and the application of disease avoidance to wildlife management and conservation.
Autoren: et al.
Quelle: Journal of Animal Ecology. Aug2023, Vol. 92 Issue 8, p1489-1508. 20p.
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Quelle: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/glsvlsi04/pdffiles/p348.pdf.
Schlagwörter: Categories and Subject Descriptors B.6.3 [Logic Design, Design Aids—Optimization, B.7.1 [Integrated Circuits, Types and Design Styles—Gate Arrays General Terms Algorithms, Design Keywords SPFD, Logic Optimization, One-to-Many Rewiring (OMR
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Weitere Verfasser:
Schlagwörter: Categories and Subject Descriptors, B.6.1 [Logic Design, Design Styles—Parallel circuits, B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware, gate arrays General Terms, Algorithms, Design, Performance Additional Key Words and Phrases, Reconfigurable computing, FPGAs, particle systems, special- purpose architectures ACM Reference Format
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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.487.6675; http://www.iml.ece.mcgill.ca/~wjgross/papers/Beeckler_Gross_TRETS_2008.pdf
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Autoren: et al.
Weitere Verfasser: et al.
Schlagwörter: Categories and Subject Descriptors, B.6.1 [Logic Design, Design Styles—Parallel Circuits, B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware, Gate arrays General Terms, Algorithms, Design, Performance Additional Key Words and Phrases, Reconfigurable computing, FPGA, super-resolution, motion deblurring
Dateibeschreibung: application/pdf
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.385.9566; http://cas.ee.ic.ac.uk/people/gac1/pubs/MariaTRETS09.pdf
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