Search Results - offset-binary coding (((((obce OR obec) OR one) OR obcii) OR obie))

A NOVEL ALU USING DISTRIBUTED ARITHMETIC FOR REAL TIME SIGNAL PROCESSING APPLICATION

Authors: M. Prasad K. Ajitta Lakshmi B. Jagadeesh et al.

Source: Proceedings on Engineering Sciences, Vol 7, Iss 1, Pp 319-328 (2025)

Subject Terms: distributed arithmetic (da), obc (offset binary coding), lut (look-up table), TA1-2040, Engineering (General). Civil engineering (General), da (distributed arithmetic)

Access URL: https://doaj.org/article/8f0269fc874149c48dfc8d6caf3e9479

A NOVEL ALU USING DISTRIBUTED ARITHMETIC FOR REAL TIME SIGNAL PROCESSING APPLICATION.

Authors: Prasad, M. Lakshmi, K. Ajita Jagadessh, B. et al.

Source: Proceedings on Engineering Sciences; 2025, Vol. 7 Issue 1, p319-327, 9p

Subject Terms: BINARY codes, ARITHMETIC, STRUCTURAL models, SIGNAL processing, SYMMETRY

An Optimized Hybrid Approach to Denoising of EEG Signals Using CNN and LMS Filtering.

Authors: Nair, Suma James, Britto Pari Leung, Man-Fai

Source: Electronics (2079-9292); Mar2025, Vol. 14 Issue 6, p1193, 17p

Subject Terms: SIGNAL-to-noise ratio, CONVOLUTIONAL neural networks, BINARY codes, SIGNAL denoising, MATRIX multiplications

Cognitive neurodynamic approaches to adaptive signal processing in wireless sensor networks.

Authors: Shanthi, K. G. Kinol, A. Mary Joy Devi, S. Rukmani et al.

Source: Cognitive Neurodynamics; 1/9/2025, Vol. 19 Issue 1, p1-23, 23p

Distributed arithmetic computation-based 2D FIR Filter Bank with parallel processing and symmetry concepts.

Authors: Odugu, Venkata Krishna Gade, Harish Babu

Source: Iran Journal of Computer Science; Dec2025, Vol. 8 Issue 4, p2475-2496, 22p

An Optimized Hybrid Approach to Denoising of EEG Signals Using CNN and LMS Filtering

Authors: Suma Nair Britto Pari James Man-Fai Leung

Source: Electronics ; Volume 14 ; Issue 6 ; Pages: 1193

Subject Terms: CNN, two’s complement distributed arithmetic, offset binary coding, radix 4, LMS filter, low power, low area

File Description: application/pdf

Relation: Microelectronics; https://dx.doi.org/10.3390/electronics14061193

Availability: https://doi.org/10.3390/electronics14061193

Physical-Layer Encryption for Terahertz Wireless Communication via Logical AND Operation of Dual Beams †.

Authors: Kamiura, Yoshiki Iwamoto, Shinji Mikami, Yuya et al.

Source: Electronics (2079-9292); Oct2025, Vol. 14 Issue 19, p3762, 19p

Subject Terms: PHYSICAL layer security, TERAHERTZ technology, BINARY operations, HOMODYNE detection, PHOTODIODES, WIRELESS communications security, WIRELESS communications

An Optimized VLSI Implementation of the Least Mean Square (LMS) Adaptive Filter Architecture on the Basis of Distributed Arithmetic Approach.

Authors: Nagabushanam, M. Chakrasali, Sadashiva Gangadharaiah, S. L. et al.

Source: Journal of the Institution of Engineers (India): Series B; Jun2025, Vol. 106 Issue 3, p861-870, 10p

WITHDRAWN: Low power implementation of adaptive block FIR filter design using offset binary coding

Authors: Ch. Pratyusha Chowdari J. B. Seventline

Source: Materials Today: Proceedings.

Subject Terms: 03 medical and health sciences, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 0305 other medical science

Access URL: https://www.sciencedirect.com/science/article/pii/S2214785320405875

Enhancing Signal Processing Efficiency in Software-Defined Radio Using Distributed Arithmetic and Look-Up Table-Based FIR Filters.

Authors: S., Hari Krishnan Sadiqvali, S.

Source: Infocommunications Journal; Dec2024, Vol. 16 Issue 4, p18-32, 15p

Subject Terms: WIRELESS telecommunication services industry, DIGITAL signal processing, SIGNAL processing, IMPULSE response, BIT error rate, FINITE impulse response filters

AREA AND POWER EFFICIENT LEAST MEAN SQUARE ADAPTIVE FILTER USING APPROXIMATE ARITHMETIC.

Authors: Raju, G. R. L. V. N. Srinivasa Janapala, Doondi Kumar Vardhan, J. Naga Vishnu et al.

Source: Proceedings on Engineering Sciences; 2024, Vol. 6 Issue 4, p1765-1770, 6p

Subject Terms: ADAPTIVE filters, VERILOG (Computer hardware description language), MULTIPLIERS (Mathematical analysis), LEAST squares, CIRCUIT complexity, MEAN square algorithms, DIGITAL signal processing, IMPULSE response, ALGORITHMS

Prototype Relationship Optimization Network for Few‐Shot Learning.

Authors: Wang, Dengzhong Zhong, Yuan Ma, Yunfei et al.

Source: IEEJ Transactions on Electrical & Electronic Engineering; Mar2025, Vol. 20 Issue 3, p405-414, 10p

Subject Terms: ELECTRICAL engineers, PROTOTYPES

Frequency-Modulated Antipodal Chaos Shift Keying Chaotic Communication on Field Program Gate Array: Prototype Design and Performance Insights.

Authors: Capligns, Filips Babajans, Ruslans Cirjulina, Darja et al.

Source: Applied Sciences (2076-3417); Feb2025, Vol. 15 Issue 3, p1156, 21p

Subject Terms: TELECOMMUNICATION systems, SIGNAL processing, THERMAL instability, GATE array circuits, CHAOS synchronization, CHAOTIC communication

A REVIEW ON DISTRIBUTED ARITHMETIC AND OFFSET BINARY CODING.

Authors: LAHARI, P. L. BHARATHI, M. SHIRUR, YASHA JYOTHI M.

Source: i-Manager's Journal on Digital Signal Processing; Jul-Sep2019, Vol. 7 Issue 3, p27-33, 7p

Subject Terms: BINARY codes, FIELD programmable gate arrays, DIGITAL signal processing, ARITHMETIC, VECTOR data

Adaptive filters using modified sliding-block distributed arithmetic with offset binary coding

Authors: W. Huang David V. Anderson

Source: 2009 IEEE International Conference on Acoustics, Speech and Signal Processing. :545-548

Subject Terms: 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 01 natural sciences

Access URL: https://dblp.uni-trier.de/db/conf/icassp/icassp2009.html#HuangA09
https://www.computer.org/csdl/proceedings/icassp/2009/2353/00/04959641.pdf
http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000004959641
https://doi.org/10.1109/ICASSP.2009.4959641
http://ieeexplore.ieee.org/document/4959641/

Very large scale integration implementation of efficient finite impulse response filter architectures using novel distributed arithmetic for digital channelizer of software defined radio.

Authors: Bhadavath, Kiran Kumar Livinsa, Z. Mary

Source: International Journal of Circuit Theory & Applications; Mar2023, Vol. 51 Issue 3, p1153-1167, 15p

Subject Terms: VERY large scale circuit integration, COMPUTER arithmetic, APPLICATION-specific integrated circuits, SOFTWARE radio, FINITE impulse response filters, IMPULSE response, MULTIPLIERS (Mathematical analysis)

Energy-efficient, high-performance and memory efficient FIR adaptive filter architecture of wireless sensor networks for IoT applications.

Authors: Kumar, J Charles Rajesh Kumar, D Vinod

Source: Sādhanā: Academy Proceedings in Engineering Sciences; Dec2022, Vol. 47 Issue 4, p1-22, 22p

Intelligent Edge Based Efficient Disease Diagnosis Using Optimization Based Deep Maxout Network.

Authors: Ancy Breen, W Muthu Vijaya Pandian, S

Source: Journal of Circuits, Systems & Computers; 9/30/2023, Vol. 32 Issue 14, p1-24, 24p

Subject Terms: GREY Wolf Optimizer algorithm, DISTRIBUTED computing, DIAGNOSIS, EDGE computing, NOXIOUS weeds

Power and Delay-Efficient Matrix Vector Multiplier Units for the LSTM Networks Using Activity Span Reduction Technique and Recursive Adders.

Authors: Joseph, Tresa Bindiya, T. S.

Source: Circuits, Systems & Signal Processing; Dec2023, Vol. 42 Issue 12, p7494-7528, 35p

Subject Terms: MATRIX multiplications, ARITHMETIC, CONSUMPTION (Economics), LOGIC, MATRICES (Mathematics)

Modified Sliding-Block Distributed Arithmetic with Offset Binary Coding for Adaptive Filters.

Authors: Huang, Walter Anderson, David V.

Source: Journal of Signal Processing Systems for Signal, Image & Video Technology; Apr2011, Vol. 63 Issue 1, p153-163, 11p, 6 Diagrams, 2 Charts, 4 Graphs