Search Results - offset-binary coding (((((((one OR one) OR one) OR obciiiee) OR spec) OR obcii) OR obciiiee))~

A NOVEL ALU USING DISTRIBUTED ARITHMETIC FOR REAL TIME SIGNAL PROCESSING APPLICATION.

Authors: Prasad, M. Lakshmi, K. Ajita Jagadessh, B. et al.

Source: Proceedings on Engineering Sciences; 2025, Vol. 7 Issue 1, p319-327, 9p

Subject Terms: BINARY codes, ARITHMETIC, STRUCTURAL models, SIGNAL processing, SYMMETRY

An Optimized Hybrid Approach to Denoising of EEG Signals Using CNN and LMS Filtering.

Authors: Nair, Suma James, Britto Pari Leung, Man-Fai

Source: Electronics (2079-9292); Mar2025, Vol. 14 Issue 6, p1193, 17p

Subject Terms: SIGNAL-to-noise ratio, CONVOLUTIONAL neural networks, BINARY codes, SIGNAL denoising, MATRIX multiplications

Distributed arithmetic computation-based 2D FIR Filter Bank with parallel processing and symmetry concepts.

Authors: Odugu, Venkata Krishna Gade, Harish Babu

Source: Iran Journal of Computer Science; Dec2025, Vol. 8 Issue 4, p2475-2496, 22p

Cognitive neurodynamic approaches to adaptive signal processing in wireless sensor networks.

Authors: Shanthi, K. G. Kinol, A. Mary Joy Devi, S. Rukmani et al.

Source: Cognitive Neurodynamics; 1/9/2025, Vol. 19 Issue 1, p1-23, 23p

A NOVEL ALU USING DISTRIBUTED ARITHMETIC FOR REAL TIME SIGNAL PROCESSING APPLICATION

Authors: M. Prasad K. Ajitta Lakshmi B. Jagadeesh et al.

Source: Proceedings on Engineering Sciences, Vol 7, Iss 1, Pp 319-328 (2025)

Subject Terms: distributed arithmetic (da), obc (offset binary coding), lut (look-up table), TA1-2040, Engineering (General). Civil engineering (General), da (distributed arithmetic)

Access URL: https://doaj.org/article/8f0269fc874149c48dfc8d6caf3e9479

An Optimized VLSI Implementation of the Least Mean Square (LMS) Adaptive Filter Architecture on the Basis of Distributed Arithmetic Approach.

Authors: Nagabushanam, M. Chakrasali, Sadashiva Gangadharaiah, S. L. et al.

Source: Journal of the Institution of Engineers (India): Series B; Jun2025, Vol. 106 Issue 3, p861-870, 10p

Intelligent Edge Based Efficient Disease Diagnosis Using Optimization Based Deep Maxout Network.

Authors: Ancy Breen, W Muthu Vijaya Pandian, S

Source: Journal of Circuits, Systems & Computers; 9/30/2023, Vol. 32 Issue 14, p1-24, 24p

Subject Terms: GREY Wolf Optimizer algorithm, DISTRIBUTED computing, DIAGNOSIS, EDGE computing, NOXIOUS weeds

Modified Sliding-Block Distributed Arithmetic with Offset Binary Coding for Adaptive Filters.

Authors: Huang, Walter Anderson, David V.

Source: Journal of Signal Processing Systems for Signal, Image & Video Technology; Apr2011, Vol. 63 Issue 1, p153-163, 11p, 6 Diagrams, 2 Charts, 4 Graphs

Physical-Layer Encryption for Terahertz Wireless Communication via Logical AND Operation of Dual Beams †.

Authors: Kamiura, Yoshiki Iwamoto, Shinji Mikami, Yuya et al.

Source: Electronics (2079-9292); Oct2025, Vol. 14 Issue 19, p3762, 19p

Subject Terms: PHYSICAL layer security, TERAHERTZ technology, BINARY operations, HOMODYNE detection, PHOTODIODES, WIRELESS communications security, WIRELESS communications

Energy-efficient, high-performance and memory efficient FIR adaptive filter architecture of wireless sensor networks for IoT applications.

Authors: Kumar, J Charles Rajesh Kumar, D Vinod

Source: Sādhanā: Academy Proceedings in Engineering Sciences; Dec2022, Vol. 47 Issue 4, p1-22, 22p

AREA AND POWER EFFICIENT LEAST MEAN SQUARE ADAPTIVE FILTER USING APPROXIMATE ARITHMETIC.

Authors: Raju, G. R. L. V. N. Srinivasa Janapala, Doondi Kumar Vardhan, J. Naga Vishnu et al.

Source: Proceedings on Engineering Sciences; 2024, Vol. 6 Issue 4, p1765-1770, 6p

Subject Terms: ADAPTIVE filters, VERILOG (Computer hardware description language), MULTIPLIERS (Mathematical analysis), LEAST squares, CIRCUIT complexity, MEAN square algorithms, DIGITAL signal processing, IMPULSE response, ALGORITHMS

Realization of Multiplexer Logic-Based 2-D Block FIR Filter Using Distributed Arithmetic.

Authors: CHOWDARI, Ch. Pratyusha SEVENTLINE, J. Beatrice

Source: Computer Assisted Methods in Engineering & Science; 2023, Vol. 30 Issue 1, p89-103, 15p

Subject Terms: INTEGRATED circuits, DIGITAL signal processing, IMAGE reconstruction, STOCHASTIC analysis, SOFTWARE architecture

Enhancing Signal Processing Efficiency in Software-Defined Radio Using Distributed Arithmetic and Look-Up Table-Based FIR Filters.

Authors: S., Hari Krishnan Sadiqvali, S.

Source: Infocommunications Journal; Dec2024, Vol. 16 Issue 4, p18-32, 15p

Subject Terms: WIRELESS telecommunication services industry, DIGITAL signal processing, SIGNAL processing, IMPULSE response, BIT error rate, FINITE impulse response filters

Tutorial: Analog Data Acquisition Technology Part I-Digital-to-Analog Conversion.

Source: IEEE Micro; 1982, Vol. 2 Issue 2, p20-37, 18p

Very large scale integration implementation of efficient finite impulse response filter architectures using novel distributed arithmetic for digital channelizer of software defined radio.

Authors: Bhadavath, Kiran Kumar Livinsa, Z. Mary

Source: International Journal of Circuit Theory & Applications; Mar2023, Vol. 51 Issue 3, p1153-1167, 15p

Subject Terms: VERY large scale circuit integration, COMPUTER arithmetic, APPLICATION-specific integrated circuits, SOFTWARE radio, FINITE impulse response filters, IMPULSE response, MULTIPLIERS (Mathematical analysis)

Power and Delay-Efficient Matrix Vector Multiplier Units for the LSTM Networks Using Activity Span Reduction Technique and Recursive Adders.

Authors: Joseph, Tresa Bindiya, T. S.

Source: Circuits, Systems & Signal Processing; Dec2023, Vol. 42 Issue 12, p7494-7528, 35p

Subject Terms: MATRIX multiplications, ARITHMETIC, CONSUMPTION (Economics), LOGIC, MATRICES (Mathematics)

An Efficient LUT Design on FPGA for Memory-Based Multiplication.

Authors: Vinitha, C. S. Sharma, R. K.

Source: Iranian Journal of Electrical & Electronic Engineering; Dec2019, Vol. 15 Issue 4, p462-476, 15p

Subject Terms: ELECTRIC equipment, ELECTRIC power, STORAGE batteries, SEMICONDUCTOR storage devices, FINITE impulse response filters

Low-Complexity Distributed-Arithmetic-Based Pipelined Architecture for an LSTM Network.

Authors: Yalamarthy, Krishna Praveen Dhall, Saurabh Khan, Mohd. Tasleem et al.

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Feb2020, Vol. 28 Issue 2, p329-338, 10p

Subject Terms: RECURRENT neural networks, ARCHITECTURE, SHORT-term memory

A REVIEW ON DISTRIBUTED ARITHMETIC AND OFFSET BINARY CODING.

Authors: LAHARI, P. L. BHARATHI, M. SHIRUR, YASHA JYOTHI M.

Source: i-Manager's Journal on Digital Signal Processing; Jul-Sep2019, Vol. 7 Issue 3, p27-33, 7p

Subject Terms: BINARY codes, FIELD programmable gate arrays, DIGITAL signal processing, ARITHMETIC, VECTOR data

An Efficient Distributed Arithmetic-Based Realization of the Decision Feedback Equalizer.

Authors: Prakash, M. Shaik, Rafi Koorapati, Sagar

Source: Circuits, Systems & Signal Processing; Feb2016, Vol. 35 Issue 2, p603-618, 16p

Subject Terms: INTERSYMBOL interference, INTERFERENCE (Telecommunication), DECISION feedback equalizers, CIRCUIT feedback, FIELD programmable gate arrays