Suchergebnisse - offset-binary coding (((((((one OR obciiie) OR obcieei) OR obiee) OR obec) OR bciii) OR obiee))

A NOVEL ALU USING DISTRIBUTED ARITHMETIC FOR REAL TIME SIGNAL PROCESSING APPLICATION

Autoren: M. Prasad K. Ajitta Lakshmi B. Jagadeesh et al.

Quelle: Proceedings on Engineering Sciences, Vol 7, Iss 1, Pp 319-328 (2025)

Schlagwörter: distributed arithmetic (da), obc (offset binary coding), lut (look-up table), da (distributed arithmetic), Engineering (General). Civil engineering (General), TA1-2040

Dateibeschreibung: electronic resource

Relation: https://pesjournal.net/journal/v7-n1/36.pdf; https://doaj.org/toc/2620-2832; https://doaj.org/toc/2683-4111

Zugangs-URL: https://doaj.org/article/8f0269fc874149c48dfc8d6caf3e9479

Cognitive neurodynamic approaches to adaptive signal processing in wireless sensor networks.

Autoren: Shanthi, K. G. Kinol, A. Mary Joy Devi, S. Rukmani et al.

Quelle: Cognitive Neurodynamics; 1/9/2025, Vol. 19 Issue 1, p1-23, 23p

An Optimized Hybrid Approach to Denoising of EEG Signals Using CNN and LMS Filtering

Autoren: Suma Nair Britto Pari James Man-Fai Leung

Quelle: Electronics ; Volume 14 ; Issue 6 ; Pages: 1193

Schlagwörter: CNN, two’s complement distributed arithmetic, offset binary coding, radix 4, LMS filter, low power, low area

Dateibeschreibung: application/pdf

Relation: Microelectronics; https://dx.doi.org/10.3390/electronics14061193

Verfügbarkeit: https://doi.org/10.3390/electronics14061193

Distributed arithmetic computation-based 2D FIR Filter Bank with parallel processing and symmetry concepts.

Autoren: Odugu, Venkata Krishna Gade, Harish Babu

Quelle: Iran Journal of Computer Science; Dec2025, Vol. 8 Issue 4, p2475-2496, 22p

An Optimized Hybrid Approach to Denoising of EEG Signals Using CNN and LMS Filtering.

Autoren: Nair, Suma James, Britto Pari Leung, Man-Fai

Quelle: Electronics (2079-9292); Mar2025, Vol. 14 Issue 6, p1193, 17p

Schlagwörter: SIGNAL-to-noise ratio, CONVOLUTIONAL neural networks, BINARY codes, SIGNAL denoising, MATRIX multiplications

A NOVEL ALU USING DISTRIBUTED ARITHMETIC FOR REAL TIME SIGNAL PROCESSING APPLICATION.

Autoren: Prasad, M. Lakshmi, K. Ajita Jagadessh, B. et al.

Quelle: Proceedings on Engineering Sciences; 2025, Vol. 7 Issue 1, p319-327, 9p

Schlagwörter: BINARY codes, ARITHMETIC, STRUCTURAL models, SIGNAL processing, SYMMETRY

Physical-Layer Encryption for Terahertz Wireless Communication via Logical AND Operation of Dual Beams †.

Autoren: Kamiura, Yoshiki Iwamoto, Shinji Mikami, Yuya et al.

Quelle: Electronics (2079-9292); Oct2025, Vol. 14 Issue 19, p3762, 19p

Schlagwörter: PHYSICAL layer security, TERAHERTZ technology, BINARY operations, HOMODYNE detection, PHOTODIODES, WIRELESS communications security, WIRELESS communications

An Optimized VLSI Implementation of the Least Mean Square (LMS) Adaptive Filter Architecture on the Basis of Distributed Arithmetic Approach.

Autoren: Nagabushanam, M. Chakrasali, Sadashiva Gangadharaiah, S. L. et al.

Quelle: Journal of the Institution of Engineers (India): Series B; Jun2025, Vol. 106 Issue 3, p861-870, 10p

Two Distributed Arithmetic Based High Throughput Architectures of Non-Pipelined LMS Adaptive Filters

Autoren: Khan, Mohd. Tasleem Alhartomi, Mohammed A. Alzahrani, Saeed et al.

Quelle: IEEE Access. 10:76693-76706

Schlagwörter: Adaptive filter (ADF), distributed arithmetic (DA), finite-impulse response (FIR), least mean square (LMS), look-up table (LUT)

Dateibeschreibung: electronic

Zugangs-URL: https://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-187599
https://liu.diva-portal.org/smash/get/diva2:1691004/FULLTEXT01.pdf

Enhancing Signal Processing Efficiency in Software-Defined Radio Using Distributed Arithmetic and Look-Up Table-Based FIR Filters.

Autoren: S., Hari Krishnan Sadiqvali, S.

Quelle: Infocommunications Journal; Dec2024, Vol. 16 Issue 4, p18-32, 15p

Schlagwörter: WIRELESS telecommunication services industry, DIGITAL signal processing, SIGNAL processing, IMPULSE response, BIT error rate, FINITE impulse response filters

Non-traditional architectures for AD- and DA-converters

Autoren: Signell, Svante

Index Begriffe: Binary codes, Computer architecture, Digital to analog conversion, Pipeline processing systems, Signal encoding, Signal processing, Digital input codes, Gray coding, Least significant bit (LSB), Most significant bit (MSB), Analog to digital conversion, Electrical Engineering, Electronic Engineering, Information Engineering, Elektroteknik och elektronik, Computer and Information Sciences, Data- och informationsvetenskap, Conference paper, info:eu-repo/semantics/conferenceObject, text

URL: http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-156301
ASICON 2005: 2005 6th International Conference on ASIC, Proceedings, p. 417-418

Prototype Relationship Optimization Network for Few‐Shot Learning.

Autoren: Wang, Dengzhong Zhong, Yuan Ma, Yunfei et al.

Quelle: IEEJ Transactions on Electrical & Electronic Engineering; Mar2025, Vol. 20 Issue 3, p405-414, 10p

Schlagwörter: ELECTRICAL engineers, PROTOTYPES

Frequency-Modulated Antipodal Chaos Shift Keying Chaotic Communication on Field Program Gate Array: Prototype Design and Performance Insights.

Autoren: Capligns, Filips Babajans, Ruslans Cirjulina, Darja et al.

Quelle: Applied Sciences (2076-3417); Feb2025, Vol. 15 Issue 3, p1156, 21p

Schlagwörter: TELECOMMUNICATION systems, SIGNAL processing, THERMAL instability, GATE array circuits, CHAOS synchronization, CHAOTIC communication

Hybrid optimal algorithm-based 2D discrete wavelet transform for image compression using fractional KCA.

Autoren: Geetha, V. Anbumani, V. Murugesan, G. et al.

Quelle: Multimedia Systems; Dec2020, Vol. 26 Issue 6, p687-702, 16p

Schlagwörter: IMAGE compression, DISCRETE wavelet transforms, IMAGE reconstruction algorithms, MULTISPECTRAL imaging, DATA compression, ALGORITHMS

A REVIEW ON DISTRIBUTED ARITHMETIC AND OFFSET BINARY CODING.

Autoren: LAHARI, P. L. BHARATHI, M. SHIRUR, YASHA JYOTHI M.

Quelle: i-Manager's Journal on Digital Signal Processing; Jul-Sep2019, Vol. 7 Issue 3, p27-33, 7p

Schlagwörter: BINARY codes, FIELD programmable gate arrays, DIGITAL signal processing, ARITHMETIC, VECTOR data

Modified Sliding-Block Distributed Arithmetic with Offset Binary Coding for Adaptive Filters

Autoren: Huang, Walter Anderson, David V.

Quelle: Journal of Signal Processing Systems ; volume 63, issue 1, page 153-163 ; ISSN 1939-8018 1939-8115

Verfügbarkeit: http://dx.doi.org/10.1007/s11265-010-0479-4
http://link.springer.com/content/pdf/10.1007/s11265-010-0479-4.pdf
http://link.springer.com/article/10.1007/s11265-010-0479-4/fulltext.html
http://link.springer.com/content/pdf/10.1007/s11265-010-0479-4

Very large scale integration implementation of efficient finite impulse response filter architectures using novel distributed arithmetic for digital channelizer of software defined radio.

Autoren: Bhadavath, Kiran Kumar Livinsa, Z. Mary

Quelle: International Journal of Circuit Theory & Applications; Mar2023, Vol. 51 Issue 3, p1153-1167, 15p

Schlagwörter: VERY large scale circuit integration, COMPUTER arithmetic, APPLICATION-specific integrated circuits, SOFTWARE radio, FINITE impulse response filters, IMPULSE response, MULTIPLIERS (Mathematical analysis)

Energy-efficient, high-performance and memory efficient FIR adaptive filter architecture of wireless sensor networks for IoT applications.

Autoren: Kumar, J Charles Rajesh Kumar, D Vinod

Quelle: Sādhanā: Academy Proceedings in Engineering Sciences; Dec2022, Vol. 47 Issue 4, p1-22, 22p

WITHDRAWN: Low power implementation of adaptive block FIR filter design using offset binary coding

Autoren: Ch. Pratyusha Chowdari J. B. Seventline

Quelle: Materials Today: Proceedings.

Schlagwörter: 03 medical and health sciences, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 0305 other medical science

Zugangs-URL: https://www.sciencedirect.com/science/article/pii/S2214785320405875

AREA AND POWER EFFICIENT LEAST MEAN SQUARE ADAPTIVE FILTER USING APPROXIMATE ARITHMETIC.

Autoren: Raju, G. R. L. V. N. Srinivasa Janapala, Doondi Kumar Vardhan, J. Naga Vishnu et al.

Quelle: Proceedings on Engineering Sciences; 2024, Vol. 6 Issue 4, p1765-1770, 6p

Schlagwörter: ADAPTIVE filters, VERILOG (Computer hardware description language), MULTIPLIERS (Mathematical analysis), LEAST squares, CIRCUIT complexity, MEAN square algorithms, DIGITAL signal processing, IMPULSE response, ALGORITHMS