Search Results - fixed nodes decoder

Analysis of Minimal LDPC Decoder System on a Chip Implementation

Authors: Palenik, Tomas Farkas, Peter Rakus, Martin et al.

Source: Radioengineering, Vol 24, Iss 3, Pp 783-790 (2015)

Subject Terms: 0203 mechanical engineering, 8. Economic growth, 0202 electrical engineering, electronic engineering, information engineering, fixed nodes decoder, Adaptive Coding and Modulation, Electrical engineering. Electronics. Nuclear engineering, 02 engineering and technology, LDPC code shortening, System on a Chip, TK1-9971

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Access URL: https://doaj.org/article/58b6cc2735e44d2c9b0fd3cd9cb55a6d
http://www.radioeng.cz/fulltexts/2015/15_03_0783_0790.pdf
http://core.ac.uk/display/30312872
http://dspace.lib.vutbr.cz/xmlui/handle/11012/51745
https://dspace.vutbr.cz/handle/11012/51745
http://hdl.handle.net/11012/51745

Analysis of Minimal LDPC Decoder System on a Chip Implementation

Authors: T. Palenik P. Farkas M. Rakus et al.

Source: Radioengineering, Vol 24, Iss 3, Pp 783-790 (2015)

Subject Terms: LDPC code shortening, System on a Chip, fixed nodes decoder, Adaptive Coding and Modulation, Electrical engineering. Electronics. Nuclear engineering, TK1-9971

File Description: electronic resource

Relation: http://www.radioeng.cz/fulltexts/2015/15_03_0783_0790.pdf; https://doaj.org/toc/1210-2512

Access URL: https://doaj.org/article/58b6cc2735e44d2c9b0fd3cd9cb55a6d

Low-Complexity Architecture for High-Speed 50G-PON LDPC Decoder

Authors: Kon-Woo Kwon Kwangok Kim Kyeonghwan Doo et al.

Source: IEEE Access, Vol 13, Pp 28751-28765 (2025)

Subject Terms: 50G-PON, LDPC decoder, high throughput, low complexity, architecture, FPGA, Electrical engineering. Electronics. Nuclear engineering, TK1-9971

File Description: electronic resource

Relation: https://ieeexplore.ieee.org/document/10879318/; https://doaj.org/toc/2169-3536

Access URL: https://doaj.org/article/6d05e1f0f46b4f369b4d517b09618880

Efficient VLSI implementation of soft-input soft-output fixed-complexity sphere decoder.

Authors: Wu, B. Masera, G.

Source: IET Communications (Institution of Engineering & Technology). 6/14/2012, Vol. 6 Issue 9, p1111-1118. 8p. 5 Diagrams, 3 Charts, 2 Graphs.

Subject Terms: *DECODERS (Electronics), *COMPUTER input-output equipment, *COMPUTATIONAL complexity, *COMPUTER network architectures, *AMPLITUDE modulation, *MIMO systems, *PERFORMANCE evaluation, *SIGNAL processing

Polar code decoding using a learning-based rescue algorithm with a successive cancellation list decoder.

Authors: Kshirsagar, Sunil Yadav Marka, Venkatrajam

Source: Physical Communication. Dec2025, Vol. 73, pN.PAG-N.PAG. 1p.

Subject Terms: 5G networks, Additive white Gaussian noise channels, Error rates, Decoding algorithms, Error-correcting codes, Bit error rate

Error-correction decoder employing multiple check-node algorithms

Novel Preprocessing-Based Sequence for Comparative MR Cervical Lymph Node Segmentation.

Authors: Tarakçı, Elif Ayten Çeliker, Metin Birinci, Mehmet et al.

Source: Journal of Clinical Medicine; Mar2025, Vol. 14 Issue 6, p1802, 18p

Subject Terms: MAGNETIC resonance imaging, CONTRAST-enhanced magnetic resonance imaging, LYMPHADENECTOMY, LYMPH nodes, DEEP learning

LDPC decoders using fixed and adjustable permutators

Deep-learning-aided dismantling of interdependent networks.

Authors: Gu, Weiwei Yang, Chen Li, Lei et al.

Source: Nature Machine Intelligence; Aug2025, Vol. 7 Issue 8, p1266-1277, 12p

ERROR-CORRECTION DECODER EMPLOYING MULTIPLE CHECK-NODE ALGORITHMS

LDPC DECODERS USING FIXED AND ADJUSTABLE PERMUTATORS

Buffer-Aided Relaying With Adaptive Link Selection—Fixed and Mixed Rate Transmission.

Authors: Zlatanov, Nikola Schober, Robert

Source: IEEE Transactions on Information Theory. May2013, Vol. 59 Issue 5, p2816-2840. 25p.

Subject Terms: *ELECTRIC relays, *DECODERS & decoding, *INFORMATION storage & retrieval systems, *TRANSMITTERS (Communication), *COMPUTER network protocols, *TIME delay systems, *COMPARATIVE studies

Efficient check node message transform approximation for LDPC decoder

Characterization of Neural Network Connectivity and Modularity of Pigeon Nidopallium Caudolaterale During Target Detection.

Authors: Wang, Zhizhong Wang, Hu Zhu, Juncai et al.

Source: Animals (2076-2615); Feb2025, Vol. 15 Issue 4, p609, 19p

Subject Terms: PREFRONTAL cortex, DISTRIBUTED computing, ARTIFICIAL intelligence, FUNCTIONAL connectivity, PIGEONS

Fully parallel implementation of timing-error-tolerant LDPC decoders

Authors: Zuo, Xin Hanzo, Lajos

Contributors: Zuo, Xin Hanzo, Lajos

Subject Terms: 621.3815

Access URL: https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.694510

EFFICIENT CHECK NODE MESSAGE TRANSFORM APPROXIMATION FOR LDPC DECODER

Efficient check node message transform approximation for LDPC decoder

An evolutionary neural architecture search for item response theory autoencoders.

Authors: Tabak, Gabriel Couto Molenaar, Dylan Curi, Mariana

Source: Behaviormetrika; Jul2025, Vol. 52 Issue 2, p293-316, 24p

Subject Terms: AUTOENCODERS, ITEM response theory, STATISTICAL models, EVOLUTIONARY models, PARAMETER estimation, ARTIFICIAL neural networks

3D hand pose and mesh estimation via a generic Topology-aware Transformer model.

Authors: Shaoqi Yu Yintong Wang Lili Chen et al.

Source: Frontiers in Neurorobotics; 2024, p1-15, 15p

Subject Terms: TRANSFORMER models, HUMAN-robot interaction

DECODER, ENCODER, CONTROLLER, METHOD AND COMPUTER PROGRAM FOR UPDATING NEURAL NETWORK PARAMETERS USING NODE INFORMATION