Výsledky vyhľadávania - drntu::engineering::computer science and engineering::hardware::logic design

Design automation for partially reconfigurable adaptive systems

Autori: Kizheppatt, Vipin Suhaib A Fahmy School of Computer Engineering a ďalší

Prispievatelia: Kizheppatt, Vipin Suhaib A Fahmy School of Computer Engineering a ďalší

Predmety: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, Engineering::Computer science and engineering::Hardware::Logic design [DRNTU]

Popis súboru: application/pdf

Prístupová URL adresa: https://dr.ntu.edu.sg/bitstream/10356/62193/1/thesis_vipin_k.pdf
https://dr.ntu.edu.sg/handle/10356/62193?mode=simple
https://dr.ntu.edu.sg/bitstream/10356/62193/1/thesis_vipin_k.pdf
https://hdl.handle.net/10356/62193

Architectures and automation for beyond-CMOS technologies

Autori: Bhattacharjee, Debjyoti Anupam Chattopadhyay School of Computer Science and Engineering a ďalší

Prispievatelia: Bhattacharjee, Debjyoti Anupam Chattopadhyay School of Computer Science and Engineering a ďalší

Predmety: Engineering::Computer science and engineering::Hardware::Memory structures [DRNTU], DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, DRNTU::Engineering::Computer science and engineering::Hardware::Memory structures, Engineering::Computer science and engineering::Hardware::Logic design [DRNTU]

Popis súboru: application/pdf

Prístupová URL adresa: https://dr.ntu.edu.sg//bitstream/10356/103664/1/thesis.pdf
https://dr.ntu.edu.sg/handle/10356/103664
https://dr.ntu.edu.sg/bitstream/10356/103664/1/thesis.pdf
https://hdl.handle.net/10356/103664
http://hdl.handle.net/10220/47437

A scalable and compact linear solver with a focus on model predictive control

Autori: Ong, Kevin Shen Hoong Suhaib A. Fahmy Ling Keck Voon a ďalší

Prispievatelia: Ong, Kevin Shen Hoong Suhaib A. Fahmy Ling Keck Voon a ďalší

Predmety: DRNTU::Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems, DRNTU::Engineering::Computer science and engineering::Hardware::Control structures and microprogramming, Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems [DRNTU], Engineering::Computer science and engineering::Hardware::Control structures and microprogramming [DRNTU], DRNTU::Engineering::Computer science and engineering::Computer systems organization::Processor architectures, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, Engineering::Computer science and engineering::Hardware::Logic design [DRNTU], Engineering::Computer science and engineering::Computer systems organization::Processor architectures [DRNTU]

Popis súboru: application/pdf

Prístupová URL adresa: https://dr.ntu.edu.sg/bitstream/10356/61839/1/meng_thesis_ko_final_v3_1.pdf
https://dr.ntu.edu.sg/bitstream/10356/61839/1/meng_thesis_ko_final_v3_1.pdf
https://dr.ntu.edu.sg/handle/10356/61839
https://hdl.handle.net/10356/61839

SRAM-based NATURE: A dynamically reconfigurable FPGA based on 10T low-power SRAMs

Autori: Jha, Niraj K. Lin, Ting-Jung Zhang, Wei a ďalší

Prispievatelia: Jha, Niraj K. Lin, Ting-Jung Zhang, Wei a ďalší

Predmety: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design

Relation: IEEE transactions on very large scale integration (VLSI) systems; https://hdl.handle.net/10356/99851; https://hdl.handle.net/10220/16544

Dostupnosť: https://hdl.handle.net/10356/99851
https://hdl.handle.net/10220/16544
https://doi.org/10.1109/TVLSI.2011.2169996

Web application for logic design

Autori: Tam, Jean San Suhaib A Fahmy School of Computer Engineering

Prispievatelia: Tam, Jean San Suhaib A Fahmy School of Computer Engineering

Predmety: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design

Popis súboru: 54 p.; application/pdf

Relation: https://hdl.handle.net/10356/62672

Dostupnosť: https://hdl.handle.net/10356/62672

Graph MMU design for Zedwulf

Autori: Han, Jianglei Nachiket Kapre School of Computer Engineering a ďalší

Prispievatelia: Han, Jianglei Nachiket Kapre School of Computer Engineering a ďalší

Predmety: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, DRNTU::Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems, DRNTU::Engineering::Computer science and engineering::Hardware::Input/output and data communications

Popis súboru: 42 p.; application/pdf

Relation: https://hdl.handle.net/10356/61961

Dostupnosť: https://hdl.handle.net/10356/61961

Hardware efficient algorithms and architectures for burst communications in cognitive radios

Autori: Syed Naveen Altaf Ahmed A. S. Madhukumar School of Computer Science and Engineering a ďalší

Prispievatelia: Syed Naveen Altaf Ahmed A. S. Madhukumar School of Computer Science and Engineering a ďalší

Predmety: DRNTU::Engineering::Electrical and electronic engineering::Wireless communication systems, DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design

Popis súboru: 172 p.; application/pdf

Relation: Syed Naveen Altaf Ahmed. (2018). Hardware efficient algorithms and architectures for burst communications in cognitive radios. Doctoral thesis, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/74185

Dostupnosť: https://hdl.handle.net/10356/74185
https://doi.org/10.32657/10356/74185

Wire level encapsulation framework for increasing FPGA design productivity

Autori: Oliver, Timothy Francis Douglas Leslie Maskell School of Computer Engineering a ďalší

Prispievatelia: Oliver, Timothy Francis Douglas Leslie Maskell School of Computer Engineering a ďalší

Predmety: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design

Popis súboru: 138 p.; application/pdf

Relation: Oliver, T. F. (2009). Wire level encapsulation framework for increasing FPGA design productivity. Doctoral thesis, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/19266

Dostupnosť: https://hdl.handle.net/10356/19266
https://doi.org/10.32657/10356/19266

Low power digital integrated circuit design using energy recovery technique

Autori: Billy Wiguna Widjaja. Lau, Kim Teen School of Computer Engineering

Prispievatelia: Billy Wiguna Widjaja. Lau, Kim Teen School of Computer Engineering

Predmety: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design

Popis súboru: application/pdf

Relation: https://hdl.handle.net/10356/2335

Dostupnosť: https://hdl.handle.net/10356/2335

Spectral representations in multiple-valued logic design

Autori: Lozano, Cicilia Claudia. Falkowski, Bogdan Jaroslaw School of Computer Engineering

Prispievatelia: Lozano, Cicilia Claudia. Falkowski, Bogdan Jaroslaw School of Computer Engineering

Predmety: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design

Popis súboru: application/pdf

Relation: https://hdl.handle.net/10356/2610

Dostupnosť: https://hdl.handle.net/10356/2610

DNA mediated transistors based on multi-valued logic

Autori: Arjun Kudva. Shu Jian Jun School of Mechanical and Aerospace Engineering

Prispievatelia: Arjun Kudva. Shu Jian Jun School of Mechanical and Aerospace Engineering

Predmety: DRNTU::Engineering::Computer science and engineering::Computing methodologies::Symbolic and algebraic manipulation, DRNTU::Engineering::Electrical and electronic engineering::Molecular electronics, DRNTU::Engineering::Electrical and electronic engineering::Semiconductors, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, DRNTU::Engineering::Computer science and engineering::Theory of computation::Logics and meanings of programs, DRNTU::Engineering::Computer science and engineering::Theory of computation::Mathematical logic and formal languages, DRNTU::Engineering::Computer science and engineering::Hardware::Integrated circuits, edu, info

Relation: http://hdl.handle.net/10356/55074

Dostupnosť: http://hdl.handle.net/10356/55074

System-level methods for power and energy efficiency of FPGA-based embedded systems

Autori: Czapski, PaweŁ Piotr Andrzej Stefan Sluzek School of Computer Engineering a ďalší

Prispievatelia: Czapski, PaweŁ Piotr Andrzej Stefan Sluzek School of Computer Engineering a ďalší

Predmety: DRNTU::Engineering::Computer science and engineering::Computer systems organization::Performance of systems, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design

Popis súboru: 155 p.; application/pdf

Relation: https://hdl.handle.net/10356/42513

Dostupnosť: https://hdl.handle.net/10356/42513
https://doi.org/10.32657/10356/42513