Suchergebnisse - algorithms and architecture for parallel processing

mcRPL: a general purpose parallel raster processing library on distributed heterogeneous architectures.

Autoren: Gao, Huan Peng, Xuantong Guan, Qingfeng et al.

Quelle: International Journal of Geographical Information Science. Sep2023, Vol. 37 Issue 9, p2043-2066. 24p.

Schlagwörter: *Distributed computing, *Library technical services, *Parallel processing, Heterogeneous distributed computing, Heterogeneous computing, Parallel algorithms

A parallel framework on hybrid architectures for raster-based geospatial cellular automata models.

Autoren: Gao, Huan Liang, Zhewei Guan, Qingfeng et al.

Quelle: International Journal of Geographical Information Science. Jul2024, Vol. 38 Issue 7, p1336-1359. 24p.

Schlagwörter: *Parallel processing, Cellular automata, Parallel programming, Land use, Parallel algorithms, Traffic flow, Land mines

Proposal and development of a highly modular and scalable self-adaptive hardware architecture with parallel processing capability

Autoren: Soto Vargas, Javier E.

Weitere Verfasser: University/Department: Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica

Thesis Advisors: Moreno Aróstegui, Juan Manuel

Quelle: TDX (Tesis Doctorals en Xarxa)

Dateibeschreibung: application/pdf

Zugangs-URL: http://hdl.handle.net/10803/277470
https://dx.doi.org/10.5821/dissertation-2117-95414

Design and VLSI Implementation of Multilayered Neural Network Architecture Using Parallel Processing and Pipelining Algorithm for Image Compression

Autoren: Sathyanarayana Murali Mohan

Quelle: i-manager's Journal on Software Engineering. 8:13-25

Zugangs-URL: https://www.imanagerpublications.com/article/2808

Potentials of Parallel Processing on CAN Networks

Autoren: Mahfoud, Mansoor (Vincent) Ganesan, Subra

Quelle: SAE Transactions, 2006 Jan 01. 115, 488-497.

Zugangs-URL: https://www.jstor.org/stable/44700077

Introduction to parallel processing : algorithms and architectures / Behrooz Parhami.

Autoren: Parhami, Behrooz.

Quelle: Bibliogr. przy rozdz. Indeks.

Schlagwörter: Przetwarzanie równoległe (informatyka)

Zugangs-URL: http://katalog.nukat.edu.pl/lib/item?id=chamo:817741&theme=nukat

Tools and Algorithms for the Construction and Analysis of Systems

Weitere Verfasser: Groote, Jan Friso Larsen, Kim Guldstrand

Schlagwörter: Theory of Computation, Computer Systems Organization and Communication Networks, Control Structures and Microprogramming, Software Engineering, Computer Engineering and Networks, architecture verification and validation, automata theory, computer systems, distributed computer systems, embedded systems, formal logic, mathematics, model checking, model-checking, parallel processing systems, SAT and SMT solving, software architecture, static and dynamic program analysis, theorem-proving, verification and validation, Computer science, Mathematical theory of computation, Computer networking & communications, Algorithms & data structures, Computer networking and communications, Computer programming / software engineering

Dateibeschreibung: application/pdf

Relation: Lecture Notes in Computer Science; Theoretical Computer Science and General Issues

Zugangs-URL: https://library.oapen.org/handle/20.500.12657/48219

AREA-DELAY EFFICIENT FFT ARCHITECTURE USING PARALLEL PROCESSING AND NEW MEMORY SHARING TECHNIQUE.

Autoren: OUERHANI, YOUSRI JRIDI, MAHER ALFALOU, AYMAN

Quelle: Journal of Circuits, Systems & Computers; Oct2012, Vol. 21 Issue 6, p-1, 15p

Schlagwörter: PARALLEL processing, COMPUTER storage devices, COMPUTER architecture, ALGORITHMS, COMPUTER input-output equipment, SIGNAL processing, COMPUTATIONAL complexity

ISP: an optimal out-of-core image-set processing streaming architecture for parallel heterogeneous systems.

Autoren: Ha LK Krüger J Dihl Comba JL et al.

Quelle: IEEE transactions on visualization and computer graphics [IEEE Trans Vis Comput Graph] 2012 Jun; Vol. 18 (6), pp. 838-51.

Publikationsart: Journal Article; Research Support, N.I.H., Extramural; Research Support, Non-U.S. Gov't; Research Support, U.S. Gov't, Non-P.H.S.

Info zur Zeitschrift: Publisher: IEEE Computer Society Country of Publication: United States NLM ID: 9891704 Publication Model: Print Cited Medium: Internet ISSN: 1941-0506 (Electronic) Linking ISSN: 10772626 NLM ISO Abbreviation: IEEE Trans Vis Comput Graph Subsets: MEDLINE

MeSH-Schlagworte: Algorithms* , Computer Graphics*, Image Processing, Computer-Assisted/*methods, Brain/anatomy & histology ; Brain/pathology ; Databases, Factual ; Diagnostic Imaging ; Humans ; Models, Theoretical ; Regression Analysis

Parallel Information Processing.

Autoren: Rasmussen, Edie M.

Quelle: Annual Review of Information Science and Technology (ARIST). 1992 27:99-130.

Peer Reviewed: Y

Page Count: 32

Descriptors: Algorithms, Computer Networks, Evaluation Methods, Information Processing, Literature Reviews, Models

Supercomputing Frontiers

Weitere Verfasser: Panda, Dhabaleswar K. Sullivan, Michael

Schlagwörter: cloud computing, computer networks, computer programming, computer systems, CUDA, distributed computer systems, gpu, gpus, hpc, microprocessor chips, mpi, parallel algorithms, parallel architectures, parallel processing systems, parallel programming, programming languages, signal processing, telecommunication systems, algorithms, high performance computing

Dateibeschreibung: application/pdf

Relation: Lecture Notes in Computer Science

Zugangs-URL: https://library.oapen.org/handle/20.500.12657/57385

Scalable software architecture for high performance video codec's on parallel processing engines

Autoren: M. Mody K. Prasad K. Rapaka

Quelle: 2007 IEEE International Symposium on Consumer Electronics. :1-6

Schlagwörter: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Zugangs-URL: http://ieeexplore.ieee.org/document/4382148/
http://yadda.icm.edu.pl/yadda/element/bwmeta1.element.ieee-000004382148
https://ieeexplore.ieee.org/document/4382148/

Ring-connected trees: a multipurpose VLSI architecture for parallel processing

Autoren: R. Dattagupta Jayasree Dattagupta S. K. Basu

Quelle: Microprocessors and Microsystems. 21:291-298

Schlagwörter: 0202 electrical engineering, electronic engineering, information engineering, 0102 computer and information sciences, 02 engineering and technology, 01 natural sciences

Zugangs-URL: https://www.sciencedirect.com/science/article/pii/S0141933197000501
https://dblp.uni-trier.de/db/journals/mam/mam21.html#BasuDD98

On algorithmic reductions in task-parallel programming models

Autoren: Ciesko, Jan

Weitere Verfasser: University/Department: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Thesis Advisors: Badia Sala, Rosa M. (Rosa Maria), Labarta Mancho, Jesús

Quelle: TDX (Tesis Doctorals en Xarxa)

Schlagwörter: Àrees temàtiques de la UPC::Informàtica

Dateibeschreibung: application/pdf

Zugangs-URL: http://hdl.handle.net/10803/457566
https://dx.doi.org/10.5821/dissertation-2117-111500

Fundamental Approaches to Software Engineering

Weitere Verfasser: Guerra, Esther Stoelinga, Mariëlle

Schlagwörter: Software Engineering/Programming and Operating Systems, Data Structures and Information Theory, Natural Language Processing (NLP), Programming Techniques, Theory of Computation, Software Engineering, architecture verification and validation, artificial intelligence, embedded systems, empirical software validation, formal logic, formal methods, model checking, model-driven software engineering, object-oriented programming, parallel processing systems, program analysis, program compilers, signal processing, software architecture, software performance, software selection and adaptation, software testing and debugging, telecommunication systems, verification, Operating systems, Algorithms & data structures, Information theory, Natural language & machine translation, Computer programming / software engineering, Computer science, Mathematical theory of computation, Artificial intelligence

Dateibeschreibung: application/pdf

Relation: Lecture Notes in Computer Science; Theoretical Computer Science and General Issues

Zugangs-URL: https://library.oapen.org/handle/20.500.12657/48217

Design and Implementation of Distributed Web Application Vulnerability Assessment Tools for Securing Complex Microservices Environment.

Autoren: Izzat, Muhammad Saputra, Ferry Astika Syarif, Iwan

Quelle: International Journal of Safety & Security Engineering; Feb2025, Vol. 15 Issue 2, p267-273, 7p

Schlagwörter: PENETRATION testing (Computer security), PARALLEL processing, DATA security failures

A transputer architecture for parallel processing of polygonal regions

Autoren: andrea tomasi claudio montani

Quelle: Second International Conference on Applications of Transputers, pp. 400–407, Southampton, UK, 11-13/07/1990
info:cnr-pdr/source/autori:Montani C.; Tomasi A./congresso_nome:Second International Conference on Applications of Transputers/congresso_luogo:Southampton, UK/congresso_data:11-13%2F07%2F1990/anno:1990/pagina_da:400/pagina_a:407/intervallo_pagine:400–407

Schlagwörter: Transputer architecture, Parallel processing, Polygonal regions

Dateibeschreibung: application/pdf

Zugangs-URL: http://www.cnr.it/prodotto/i/452775
https://publications.cnr.it/doc/452775
https://hdl.handle.net/20.500.14243/399938
https://hdl.handle.net/11568/936364

Parallel Processing of Multichannel Video Based on Multicore Architecture

Autoren: Miroslav Popovic Vladimir Marinkovic Branislav Kordic et al.

Quelle: 2013 3rd Eastern European Regional Conference on the Engineering of Computer Based Systems. :157-160

Schlagwörter: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Zugangs-URL: http://ieeexplore.ieee.org/document/6664524/
https://doi.org/10.1109/ECBS-EERC.2013.29
https://doi.ieeecomputersociety.org/10.1109/ECBS-EERC.2013.29
https://ieeexplore.ieee.org/document/6664524/

Proposal and development of a highly modular and scalable self-adaptive hardware architecture with parallel processing capability

Autoren: Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica Moreno Aróstegui, Juan Manuel Soto Vargas, Javier E.

Quelle: TDX (Tesis Doctorals en Xarxa)

Index Begriffe: Àrees temàtiques de la UPC::Enginyeria electrònica, Arquitectura d'ordinadors, Ordinadors -- Disseny i funcionament, Processament en paral·lel (Ordinadors), Doctoral thesis

URL: https://hdl.handle.net/2117/95414
https://hdl.handle.net/10803/277470

Hyperspectral image classification using parallel autoencoding diabolo networks on multi-core and many-core architectures

Autoren: Torti, Emanuele Fontanella, Alessandro Plaza Miguel, Antonio J. et al.

Quelle: TORTI, Emanuele, FONTANELLA, Alessandro, PLAZA, Antonio, PLAZA, Javier and LEPORATI, Francesco. Hyperspectral Image Classification Using Parallel Autoencoding Diabolo Networks on Multi-Core and Many-Core Architectures. Electronics [online]. 8 December 2018. Vol. 7, no. 12, p. 411. DOI 10.3390/electronics7120411. Available from: http://dx.doi.org/10.3390/electronics7120411

Relation: https://www.mdpi.com/2079-9292/7/12/411; https://doi.org/10.3390/electronics7120411

Zugangs-URL: http://hdl.handle.net/10662/11058