Search Results - algorithms and architectural for parallel processing

Scalable Parallel Processing: Architectural Models, Real-Time Programming, and Performance Evaluation

Authors: Mirela Sino Ervin Domazet

Source: Engineering Proceedings, Vol 104, Iss 1, p 60 (2025)

Subject Terms: parallel processing, SIMD, MIMD, parallel programming real-time, parallel sort algorithm, Engineering machinery, tools, and implements, TA213-215

File Description: electronic resource

Relation: https://www.mdpi.com/2673-4591/104/1/60; https://doaj.org/toc/2673-4591

Access URL: https://doaj.org/article/e564d7ea6cfd4c2196cce260f4e4cc5e

Parallel Processing of Sobel Edge Detection on FPGA: Enhancing Real-Time Image Analysis.

Authors: Ravichandran, Sanmugasundaram Su, Hui-Kai Kuo, Wen-Kai et al.

Source: Sensors (14248220). Jun2025, Vol. 25 Issue 12, p3649. 19p.

Subject Terms: *COMPUTER vision, *DETECTION algorithms, *OBJECT recognition (Computer vision), *IMAGE processing, *IMAGE analysis

Parallel conjugate gradient: effects of ordering strategies, programming paradigms, and architectural platforms

Contributors: Biswas, R

Source: Conference: 13th International Conference on Parallel and Distributed Computing Systems, Las Vegas, NV (US), 08/08/2000--08/10/2000; Other Information: PBD: 1 May 2000

File Description: Medium: ED; Size: 15 pages

Access URL: http://www.osti.gov/scitech/servlets/purl/775130

Architectural Support for Reducing Parallel Processing Overhead in an Embedded Multiprocessor

Authors: Wang, Jian Sohl, Joar Dake, Liu

Source: ePUMA EUC '10 Proceedings of the 2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing. :47-52

Subject Terms: Parallel DSP, Multiprocessor, Control overhead, Communication overhead, Matrix multiplication, TECHNOLOGY, TEKNIKVETENSKAP

File Description: electronic

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-66220
https://liu.diva-portal.org/smash/get/diva2:402562/FULLTEXT01.pdf

A Library and Environment for Parallel Processing in a Power-Limited CPU+GPU Cluster Environment

Authors: Piotr Sienski Sebastian Lesniewski Aleksandra Hein et al.

Source: IEEE Access, Vol 13, Pp 180479-180512 (2025)

Subject Terms: CPU + GPU, multi-node GPU system, optimization, multi-threaded, parallel programming, performance and power, Electrical engineering. Electronics. Nuclear engineering, TK1-9971

File Description: electronic resource

Relation: https://ieeexplore.ieee.org/document/11202505/; https://doaj.org/toc/2169-3536

Access URL: https://doaj.org/article/25649750617142e2878dd03a228a7339

SPCTRE: sparsity-constrained fully-digital reservoir computing architecture on FPGA.

Authors: Abe, Yuki Nishida, Kohei Ando, Kota et al.

Source: International Journal of Parallel, Emergent & Distributed Systems. Apr2024, Vol. 39 Issue 2, p197-213. 17p.

Subject Terms: *ARCHITECTURAL design, *ARTIFICIAL intelligence, *PARALLEL processing, *PARALLEL programming, *ALGORITHMS

Architectural Design Guidelines Based on Computer Core Evaluation and Processing Paradigms

Authors: Jose L. Reategui

Source: Engineering Proceedings, Vol 55, Iss 1, p 43 (2023)

Subject Terms: cloud computing, quantum computing, parametric design, genetic algorithm, architectural design, Engineering machinery, tools, and implements, TA213-215

File Description: electronic resource

Relation: https://www.mdpi.com/2673-4591/55/1/43; https://doaj.org/toc/2673-4591

Access URL: https://doaj.org/article/8f9c0eee917041d1ac5112a0da21f320

GBEES-GPU: An efficient parallel GPU algorithm for high-dimensional nonlinear uncertainty propagation.

Authors: Hanson, Benjamin L. Rubio, Carlos García-Gutiérrez, Adrián et al.

Source: Computer Physics Communications. Dec2025, Vol. 317, pN.PAG-N.PAG. 1p.

Subject Terms: *GRAPHICS processing units, *OPTIMIZATION algorithms, *SENSITIVITY analysis, *DIMENSIONAL analysis, *PARALLEL processing, *BAYES' estimation, *LORENZ equations

Area-time efficient pipelined number theoretic transform for CRYSTALS-Kyber.

Authors: Waris, Ayesha Aziz, Arshad Khan, Bilal Muhammad

Source: PLoS ONE. 5/14/2025, Vol. 20 Issue 5, p1-27. 27p.

Subject Terms: *PARALLEL processing, *COMMUTATION (Electricity), *PRODUCT improvement, *CRYPTOGRAPHY, *MULTIPLICATION

Novel Implementation Approach with Enhanced Memory Access Performance of MGS Algorithm for VLIW Architecture.

Authors: Najoui, Mohamed Hatim, Anas Belkouch, Said et al.

Source: Journal of Circuits, Systems & Computers. Oct2020, Vol. 29 Issue 12, pN.PAG-N.PAG. 23p.

Subject Terms: *ALGORITHMS, *PARALLEL processing, *SCHEDULING software, *LINEAR equations, *IMAGE processing

Algorithmic and Architectural optimization techniques in particle filtering for FPGA-Based navigation applications

Authors: Getachew Sileshi, Biruk

Contributors: University/Department: Universitat Autònoma de Barcelona. Departament de Microelectrònica i Sistemes Electrònics

Thesis Advisors: Oliver Malagelada, Joan

Source: TDX (Tesis Doctorals en Xarxa)

Subject Terms: Filtres de partículas, Filtros de partículas, Particle filters, FPGA, SLAM, Tecnologies

File Description: application/pdf

Access URL: http://hdl.handle.net/10803/393935

Architectural strategies to enhance the latency and energy efficiency of mobile continuous visual localization systems

Authors: Taranco Serna, Raúl

Contributors: University/Department: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Thesis Advisors: Arnau Montañés, José María, González Colás, Antonio María

Source: TDX (Tesis Doctorals en Xarxa)

Subject Terms: Continuous Vision Systems, Hardware Accelerator, SIMD, ISP, SLAM, Localization, Autonomous Driving, Augmented Reality, Extended Reality, Àrees temàtiques de la UPC::Informàtica

File Description: application/pdf

Access URL: http://hdl.handle.net/10803/692250
https://dx.doi.org/10.5821/dissertation-2117-415317

Architectural explorations for streaming accelerators with customized memory layouts

Authors: Shafiq, Muhammad

Contributors: University/Department: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Thesis Advisors: Ayguadé i Parra, Eduard, Navarro, Nacho

Source: TDX (Tesis Doctorals en Xarxa)

Subject Terms: streaming accelerators, RTM, common memory layout, template expansion system, TARCAD, reconfigurable accelerators, black smith computing, hybrid GPU

File Description: application/pdf

Access URL: http://hdl.handle.net/10803/84170
https://dx.doi.org/10.5821/dissertation-2117-94639

Algorithms and Architectures for Parallel Processing

Authors: Tianqing Zhu Jin Li Aniello Castiglione

Resource Type: eBook.

Subjects: Parallel processing (Electronic computers)--Congresses, Computer architecture--Congresses, Computer algorithms--Congresses

Categories: COMPUTERS / Computer Science, COMPUTERS / Artificial Intelligence / General, COMPUTERS / Artificial Intelligence / Computer Vision & Pattern Recognition, COMPUTERS / Hardware / General, MATHEMATICS / Probability & Statistics / General

Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics.

Authors: Minutoli, Marco Castellana, Vito Giovanni Saporetti, Nicola et al.

Source: IEEE Transactions on Computers. Mar2022, Vol. 71 Issue 3, p520-533. 14p.

Subject Terms: *PARALLEL processing, FIELD programmable gate arrays, GRAPH algorithms, GRAPHICS processing units

Parallel Processing and Applied Mathematics

Authors: Roman Wyrzykowski Jack Dongarra Ewa Deelman et al.

Resource Type: eBook.

Subjects: Artificial intelligence, Mathematics--Congresses, Parallel processing (Electronic computers)--Congresses

Categories: COMPUTERS / Artificial Intelligence / General

Algorithms and Architectures for Parallel Processing : 23rd International Conference, ICA3PP 2023, Tianjin, China, October 20–22, 2023, Proceedings, Part VII

Authors: Zahir Tari Keqiu Li Hongyi Wu

Resource Type: eBook.

Subjects: Algorithms, Machine learning, Computer engineering, Computer networks, Computer vision

Categories: COMPUTERS / Computer Science, COMPUTERS / Artificial Intelligence / General, COMPUTERS / Artificial Intelligence / Computer Vision & Pattern Recognition, COMPUTERS / Hardware / General, MATHEMATICS / Probability & Statistics / General

Algorithms and Architectures for Parallel Processing : 23rd International Conference, ICA3PP 2023, Tianjin, China, October 20–22, 2023, Proceedings, Part II

Authors: Zahir Tari Keqiu Li Hongyi Wu

Resource Type: eBook.

Subjects: Algorithms, Machine learning, Computer engineering, Computer networks, Computer vision

Categories: COMPUTERS / Computer Science, COMPUTERS / Artificial Intelligence / General, COMPUTERS / Artificial Intelligence / Computer Vision & Pattern Recognition, COMPUTERS / Hardware / General, MATHEMATICS / Probability & Statistics / General

Parallel hierarchical radiosity rendering

Contributors: Carter, Michael [Iowa State Univ., Ames, IA (United States)]

Source: Other Information: TH: Thesis (Ph.D.); PBD: Jul 1993

File Description: Medium: ED; Size: 180 p.

Access URL: http://www.osti.gov/scitech/servlets/purl/10115017

Parallel Algorithms

Authors: Sandeep N. Bhatt

Resource Type: eBook.

Subjects: Parallel algorithms--Congresses, Parallel programming (Computer science)--Congres

Categories: COMPUTERS / Parallel Processing, COMPUTERS / Programming / Algorithms, MATHEMATICS / Arithmetic