Search Results - algorithm hardware implementation

Hardware Implementation of a Real-Time Adaptive Time-Series Segmentation Algorithm for Intracortical Implants.

Authors: Galeote-Checa G Panuccio G Linares-Barranco B et al.

Source: IEEE transactions on biomedical circuits and systems [IEEE Trans Biomed Circuits Syst] 2025 Oct 16; Vol. PP. Date of Electronic Publication: 2025 Oct 16.

Publication Type: Journal Article

Journal Info: Publisher: IEEE Country of Publication: United States NLM ID: 101312520 Publication Model: Print-Electronic Cited Medium: Internet ISSN: 1940-9990 (Electronic) Linking ISSN: 19324545 NLM ISO Abbreviation: IEEE Trans Biomed Circuits Syst Subsets: MEDLINE

Global MPP Tracking Under Partial Shading Conditions Using LandS Algorithm: Hardware Implementation

Authors: Mostapha Oulcaid El Mehdi Acim Nabil Hmina et al.

Source: Lecture Notes in Electrical Engineering ISBN: 9789819701254

Research progress and future prospects in intelligent lung sound diagnosis: models, lightweight design, and hardware platform implementation.

Authors: Lu X Fang J Xiao W et al.

Source: Biomedizinische Technik. Biomedical engineering [Biomed Tech (Berl)] 2025 Sep 19; Vol. 70 (6), pp. 483-501. Date of Electronic Publication: 2025 Sep 19 (Print Publication: 2025).

Publication Type: Journal Article; Review

Journal Info: Publisher: Walter de Gruyter Publishers Country of Publication: Germany NLM ID: 1262533 Publication Model: Electronic-Print Cited Medium: Internet ISSN: 1862-278X (Electronic) Linking ISSN: 00135585 NLM ISO Abbreviation: Biomed Tech (Berl) Subsets: MEDLINE

MeSH Terms: Respiratory Sounds*/physiology , Lung*/physiology, Humans ; Algorithms ; Deep Learning ; Equipment Design ; Signal Processing, Computer-Assisted/instrumentation

A side-channel attack on a masked hardware implementation of CRYSTALS-Kyber

Authors: Ji, Yanning Dubrova, Elena

Source: JOURNAL OF CRYPTOGRAPHIC ENGINEERING. 15(1)

Subject Terms: Public key cryptography, Post-quantum cryptography, CRYSTALS-Kyber, LWE/LWR-based KEM, Side-channel attack, Deep learning

File Description: print

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-362930
https://doi.org/10.1007/s13389-025-00375-7

Hardware Design and Implementation of a Lightweight Saber Algorithm Based on DRC Method

Authors: Weifang Zheng Huihong Zhang Yuejun Zhang et al.

Source: Electronics; Volume 12; Issue 11; Pages: 2525

Subject Terms: 0301 basic medicine, 0303 health sciences, 03 medical and health sciences, post-quantum cryptographic algorithms, Saber algorithm, IP hardware implementation, low overhead, 7. Clean energy

File Description: application/pdf

Hardware implementation of machine learning algorithms for image processing

Authors: Valls Sansaloni, Luis Orlandic, Milica Boyle, Samuel et al.

Contributors: Valls Sansaloni, Luis Orlandic, Milica Boyle, Samuel et al.

Availability: https://hdl.handle.net/11250/3159394

Hardware Implementation of a Method for Improving Object Discernibility In Poor Visibility Conditions Images ; Аппаратная реализация метода улучшения различимости объектов на изображениях, полученных в условиях недостаточной видимости

Authors: Yuri Mickhayluck Denis Nacharov Юрий Петрович Михайлюк et al.

Source: The Herald of the Siberian State University of Telecommunications and Information Science; Том 19, № 1 (2025); 65-79 ; Вестник СибГУТИ; Том 19, № 1 (2025); 65-79 ; 1998-6920 ; 10.55648/1998-6920-2025-19-1

Subject Terms: улучшение качества, algorithm hardware implementation, Verilog, visibility, contrast, linear contrast enhancement, fog, mist, FPGA, quality improvement, аппаратная реализация алгоритмов, видимость, контраст, линейное контрастирование, туман, дымка, ПЛИС

File Description: application/pdf

Relation: https://vestnik.sibsutis.ru/jour/article/view/803/786; https://vestnik.sibsutis.ru/jour/article/downloadSuppFile/803/20; https://vestnik.sibsutis.ru/jour/article/downloadSuppFile/803/21; Михайлюк Ю. П., Начаров Д. В. Метод улучшения различимости объектов на цифровых изображениях, полученных в условиях недостаточной видимости // Журнал радиоэлектроники [электронный журнал]. 2015. No6.; He K., Sun J., Tang X. Single Image Haze Removal Using Dark Channel Prior // Proc. of the 2009 IEEE Conference on Computer Vision and Pattern Recognition, 2009. P. 1956–1963.; Tarel J. -P., Hautiere N., Caraffa L., Cord A., Halmaoui H., Gruyer D. Vision Enhancement in Homogeneous and Heterogeneous Fog // IEEE Intelligent Transportation Systems Magazine. 2012. V. 4, Is. 2, P. 6–20.; Duminil A., Tarel J. -P., Brémond R. Single Image Atmospheric Veil Removal Using New Priors // Proc. of the 2021 IEEE International Conference on Image Processing (ICIP). 2021. P. 1719–1723.; Zhang J., Li F., Kang M., Luo X., Zhao J., Xiao Ch., Du H., Wang H. A Method of Image Dehazing Based on Atmospheric Veil Prediction by ResNet // Proc. of the 2nd Workshop on User-centric Narrative Summarization of Long Videos. 2023. P. 17–24.; Varalakshmi J., Jose D., Kumar P. N. FPGA Implementation of Haze Removal Technique Based on Dark Channel Prior // Computational Vision and Bio-Inspired Computing (ICCVBIC 2021), 2021. P. 624–630.; Cyclone V Device Overview : technical description [Электронный ресурс]. URL: https://www.altera.com/en_US/pdfs/literature/hb/cyclone-v/cv_51001.pdf (дата обращения: 20.04.2023).; ADV7123 technical description [Электронный ресурс]. URL: http://www.analog.com/media/en/technical-documentation/data-sheets/ADV7123.pdf (дата обращения: 20.04.2023).; Altera Phase-Locked Loop IP Core User Guide : technical description [Электронный ресурс] URL:https://www.altera.com/en_US/pdfs/literature/ug/altera_pll.pdf (дата обращения: 20.04.2023); Kumar A. K., Jeevaratnam N., Patnaik S. On-Chip Memory for Image Processing Applications Based on FPGA // Proc. of the International conference on Signal Processing, Communication, Power and Embedded System, 2016. P.1598–1602.; Licciardo G. D., Cappetta C., Di Benedetto L. FPGA Optimization of Convolution-based 2D Filtering Processor for Image Processing // Proc. of the 8th Computer Science and Electronic Engineering Conference, 2016. P.180–185; https://vestnik.sibsutis.ru/jour/article/view/803

Availability: https://vestnik.sibsutis.ru/jour/article/view/803
https://doi.org/10.55648/1998-6920-2025-19-1-65-79

Hardware Implementation of Machine Learning and Deep-Learning Systems oriented to Image Processing

Authors: Franco Frasser, Christiam Camilo

Thesis Advisors: Rosselló Sanz, José Luis, Roca Adrover, Miquel Jesús

Source: TDX (Tesis Doctorals en Xarxa)

Subject Terms: Digital Systerns, FPGA, Machine Learníng, Pattern Recognition, Artificial Neural Networks, Stochastic Computing, ConvolutionaI NeuralNetworks, Edge Computing, lmplementació eficient de Machíne Learning en hardware

Time: 621.3

File Description: application/pdf

Access URL: http://hdl.handle.net/10803/674682

An optimized hardware implementation of the CORDIC algorithm

Authors: Chaoran Wu Fei Lyu Hongbing Pan et al.

Source: IEICE Electronics Express. 2022, 19(21):20220362

DESIGN ISSUES FOR HARDWARE IMPLEMENTATION OF AN ALGORITHM FOR SEGMENTING HYPERSPECTRAL IMAGERY

Source: Conference: Conference title not supplied, Conference location not supplied, Conference dates not supplied; Other Information: PBD: 1 Oct 2000

File Description: Medium: P; Size: vp.

Access URL: http://www.osti.gov/scitech/servlets/purl/766208

Recognition of mushrooms and classification of edible and toxic families using hardware implementation of CNN algorithms on an embedded system

Authors: Bouganssa, Tarik Salbi, Adil Aarabi, Samar et al.

Source: Research Journal of Pharmacy and Technology 17(2):860-866. 2024

Spike sorting algorithms and their efficient hardware implementation: a comprehensive survey.

Authors: Zhang T Rahimi Azghadi M Lammie C et al.

Source: Journal of neural engineering [J Neural Eng] 2023 Apr 14; Vol. 20 (2). Date of Electronic Publication: 2023 Apr 14.

Publication Type: Journal Article; Review

Journal Info: Publisher: Institute of Physics Pub Country of Publication: England NLM ID: 101217933 Publication Model: Electronic Cited Medium: Internet ISSN: 1741-2552 (Electronic) Linking ISSN: 17412552 NLM ISO Abbreviation: J Neural Eng Subsets: MEDLINE

MeSH Terms: Signal Processing, Computer-Assisted* , Algorithms*, Action Potentials/physiology ; Computers ; Microelectrodes ; Models, Neurological

Custom optimization algorithms for efficient hardware implementation

Authors: Jerez, Juan Luis Constantinides, George Kerrigan, Eric

Contributors: Jerez, Juan Luis Constantinides, George Kerrigan, Eric

Subject Terms: 621.3

Access URL: https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.592723

Digital Hardware Implementation of ReSuMe Learning Algorithm for Spiking Neural Networks.

Authors: Khatiboun DF Rezaeiyan Y Ronchini M et al.

Source: Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Annual International Conference [Annu Int Conf IEEE Eng Med Biol Soc] 2023 Jul; Vol. 2023, pp. 1-4.

Publication Type: Journal Article

Journal Info: Publisher: [IEEE] Country of Publication: United States NLM ID: 101763872 Publication Model: Print Cited Medium: Internet ISSN: 2694-0604 (Electronic) Linking ISSN: 23757477 NLM ISO Abbreviation: Annu Int Conf IEEE Eng Med Biol Soc Subsets: MEDLINE

MeSH Terms: Neurons* , Neuronal Plasticity*, Models, Neurological ; Neural Networks, Computer ; Algorithms

Supervised Contrastive Learning Framework and Hardware Implementation of Learned ResNet for Real-Time Respiratory Sound Classification.

Authors: Hu J Leow CS Tao S et al.

Source: IEEE transactions on biomedical circuits and systems [IEEE Trans Biomed Circuits Syst] 2025 Feb; Vol. 19 (1), pp. 185-195. Date of Electronic Publication: 2025 Feb 11.

Publication Type: Journal Article; Research Support, Non-U.S. Gov't

Journal Info: Publisher: IEEE Country of Publication: United States NLM ID: 101312520 Publication Model: Print-Electronic Cited Medium: Internet ISSN: 1940-9990 (Electronic) Linking ISSN: 19324545 NLM ISO Abbreviation: IEEE Trans Biomed Circuits Syst Subsets: MEDLINE

MeSH Terms: Signal Processing, Computer-Assisted*/instrumentation , Respiratory Sounds*/classification , Respiratory Sounds*/physiology , Supervised Machine Learning*, Humans ; Algorithms ; Bayes Theorem ; Neural Networks, Computer

Parallel and Hardware Implementations of Collision Detection Algorithms

Authors: Fenton-May, Tristam

Subject Terms: 004

Access URL: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.491445

A new number representation for hardware implementation of DSP algorithms

Authors: Ewe, Chun Te

Subject Terms: 621.382

Access URL: http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.501468

Parallel Smith-Waterman Algorithm Hardware Implementation for Ancestors and Offspring Gene Tracer

Authors: Asmaa G. Seliem Wael Abou El-Wafa Hesham F. A. Hamed et al.

Source: 2016 World Symposium on Computer Applications & Research (WSCAR). :116-121

Subject Terms: 0301 basic medicine, 03 medical and health sciences

Access URL: http://ieeexplore.ieee.org/document/7791991/

Lightweight skin cancer detection IP hardware implementation using cycle expansion and optimal computation arrays methods.

Authors: Li Q Zhang Y Wang L et al.

Source: Computers in biology and medicine [Comput Biol Med] 2024 Dec; Vol. 183, pp. 109258. Date of Electronic Publication: 2024 Oct 23.

Publication Type: Journal Article

Journal Info: Publisher: Elsevier Country of Publication: United States NLM ID: 1250250 Publication Model: Print-Electronic Cited Medium: Internet ISSN: 1879-0534 (Electronic) Linking ISSN: 00104825 NLM ISO Abbreviation: Comput Biol Med Subsets: MEDLINE

MeSH Terms: Skin Neoplasms*/diagnostic imaging , Skin Neoplasms*/diagnosis , Neural Networks, Computer*, Humans ; Algorithms

Hardware Design and Implementation of a Lightweight Saber Algorithm Based on DRC Method.

Authors: Zheng, Weifang Zhang, Huihong Zhang, Yuejun et al.

Source: Electronics (2079-9292); Jun2023, Vol. 12 Issue 11, p2525, 15p

Subject Terms: STATIC random access memory, QUANTUM computers, ALGORITHMS, CLOCKS & watches, HARDWARE, CRYPTOSYSTEMS