Search Results - acm: c.: computer systems organization/c.1: processor (architectural* OR architecture*)
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1
Authors: et al.
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Source: The 13th Conference on Information Technology and its Applications (CITA2024)
The 13th Conference on Information Technology and its Applications (CITA2024), Jul 2024, Da Nang City, VietnamSubject Terms: Pose detection, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.7: Neural nets, Object detection, Rotation invariance evaluation, ACM: I.: Computing Methodologies/I.5: PATTERN RECOGNITION/I.5.4: Applications/I.5.4.0: Computer vision, [INFO]Computer Science [cs], Human detection, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI]
Access URL: https://hal.science/hal-04706818
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2
Authors: et al.
Contributors: et al.
Source: https://inria.hal.science/hal-03956456 ; Inria & Université Côte d'Azur, CNRS, I3S. 2023, pp.23.
Subject Terms: Web of Data, Gossip protocol, graph replication, limited connectivity, semantic overlay, mobile contributor, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.4: Knowledge Representation Formalisms and Methods, [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]
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3
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Source: IEEE Transactions on Multi-Scale Computing Systems. 4:833-846
Subject Terms: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Neuromorphic Computing, 0301 basic medicine, [INFO.INFO-DC]Computer Science [cs]/Distributed, [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.7: Neural nets, [INFO.INFO-NE] Computer Science [cs]/Neural and Evolutionary Computing [cs.NE], Unsupervised Learning, 02 engineering and technology, [INFO.INFO-NE]Computer Science [cs]/Neural and Evolutionary Computing [cs.NE], Memristor, Parallel, [INFO.INFO-ES] Computer Science [cs]/Embedded Systems, Spiking Neural Networks, 03 medical and health sciences, and Cluster Computing [cs.DC], Parameter Evaluations, [INFO.INFO-ET] Computer Science [cs]/Emerging Technologies [cs.ET], [INFO.INFO-DC] Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-ET]Computer Science [cs]/Emerging Technologies [cs.ET]
File Description: application/pdf
Access URL: https://hal.archives-ouvertes.fr/hal-01615032/file/TMSCSSI-2016-10-0051.R1-main.pdf
https://ieeexplore.ieee.org/document/8063353
https://hal.archives-ouvertes.fr/hal-01615032/document
https://jglobal.jst.go.jp/en/detail?JGLOBAL_ID=201902258056300336
https://dblp.uni-trier.de/db/journals/tmscs/tmscs4.html#ShahsavariB18
https://hal.archives-ouvertes.fr/hal-01615032
https://hal.science/hal-01615032v1/document
https://hal.science/hal-01615032v1
https://doi.org/10.1109/tmscs.2017.2761231 -
4
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Source: ISSN: 1424-8220 ; Sensors ; https://hal.science/hal-03841221 ; Sensors, 2022, 22 (18), pp.6875. ⟨10.3390/s22186875⟩.
Subject Terms: ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.1: Mobile processors, [INFO.INFO-MC]Computer Science [cs]/Mobile Computing, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR]
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5
Authors: et al.
Contributors: et al.
Source: https://hal.science/hal-03911564 ; 2023.
Subject Terms: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.7: Neural nets, ACM: F.: Theory of Computation/F.1: COMPUTATION BY ABSTRACT DEVICES/F.1.1: Models of Computation, ACM: F.: Theory of Computation/F.1: COMPUTATION BY ABSTRACT DEVICES/F.1.1: Models of Computation/F.1.1.4: Self-modifying machines (e.g., neural networks), ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.4: Knowledge Representation Formalisms and Methods, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.6: Learning, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.7: Natural Language Processing, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.5: Model Development, ACM: I.: Computing Methodologies/I.7: DOCUMENT AND TEXT PROCESSING, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], [INFO.INFO-BI]Computer Science [cs]/Bioinformatics [q-bio.QM], [INFO.INFO-CL]Computer Science [cs]/Computation and Language [cs.CL], [INFO.INFO-LG]Computer Science [cs]/Machine Learning [cs.LG], [INFO.INFO-TT]Computer Science [cs]/Document and Text Processing
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6
TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA
Authors: et al.
Contributors: et al.
Source: ACM Transactions on Embedded Computing Systems. 15:1-27
Subject Terms: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, 13. Climate action, Electronic System Level, 0202 electrical engineering, electronic engineering, information engineering, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, Multiprocessor, 02 engineering and technology, High-Level Synthesis, ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.2: Design Tools and Techniques, System-on-Chip
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Source: CCNC 2020: 17th Consumer Communications & Networking Conference ; https://hal.science/hal-02459433 ; CCNC 2020: 17th Consumer Communications & Networking Conference, Jan 2020, Las Vegas, United States. pp.1-6, ⟨10.1109/CCNC46108.2020.9045173⟩
Subject Terms: Cloud-edge offloading, Resource allocation, Edge computing, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.1: Network Architecture and Design/C.2.1.3: Distributed networks, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, [INFO.INFO-NI]Computer Science [cs]/Networking and Internet Architecture [cs.NI]
Subject Geographic: Las Vegas, United States
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8
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Source: PARMA-DITAM ; https://hal.science/hal-01704702 ; PARMA-DITAM, Jan 2018, Manchester, United Kingdom. ⟨10.1145/3183767.3183780⟩
Subject Terms: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Subject Geographic: Manchester, United Kingdom
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9
Authors: et al.
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Source: International Conference on High-Performance and Embedded Architectures and Compilers ; https://inria.hal.science/inria-00525139 ; International Conference on High-Performance and Embedded Architectures and Compilers, Manolis Katevenis and Margaret Martonosi, Jan 2011, Heraklion, Greece
Subject Terms: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.7: Single-instruction-stream, multiple-data-stream processors (SIMD), ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.13: Reusable Software, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.0: Code generation, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.1: Compilers, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.6: Optimization, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH]
Relation: info:eu-repo/grantAgreement//26535/EU/High-Performance Embedded Architectures and Compilers/HIPEAC
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10
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Source: CADS 2017 - 19th CSI International Symposium on Computer Architecture & Digital Systems ; https://hal.science/hal-01633418 ; CADS 2017 - 19th CSI International Symposium on Computer Architecture & Digital Systems, Dec 2017, Kish, Iran
Subject Terms: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.7: Neural nets, ACM: I.: Computing Methodologies/I.5: PATTERN RECOGNITION, [INFO.INFO-NE]Computer Science [cs]/Neural and Evolutionary Computing [cs.NE], [INFO.INFO-CV]Computer Science [cs]/Computer Vision and Pattern Recognition [cs.CV], [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI]
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Source: RAPIDO '15 Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools ; https://cea.hal.science/cea-01818887 ; RAPIDO '15 Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, Jan 2015, Amsterdam, Netherlands. ⟨10.1145/2693433.2693440⟩
Subject Terms: ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems/I.6.7.0: Environments, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures, [INFO]Computer Science [cs]
Subject Geographic: Amsterdam, Netherlands
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12
Authors: et al.
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Source: Bringing Theory to Practice: Predictability and Performance in Embedded Systems ; https://inria.hal.science/inria-00585320 ; Bringing Theory to Practice: Predictability and Performance in Embedded Systems, Philipp Lucas, Lothar Thiele, Benoit Triquet, Theo Ungerer, and Reinhard Wilhelm, Mar 2011, Grenoble, France. pp.11-21, ⟨10.4230/OASIcs.PPES.2011.11⟩ ; http://drops.dagstuhl.de/opus/volltexte/2011/3077/pdf/2.pdf
Subject Terms: WCET-aware Compilation, WCET Analysis, Time-predictable Architecture, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.2: Real-time and embedded systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures/C.1.1.2: RISC/CISC, VLIW architectures, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF]
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13
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Source: DATE 2018 - IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition ; https://hal.science/hal-01653110 ; DATE 2018 - IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition, Mar 2018, Dresden, Germany. pp.1009-1014, ⟨10.23919/DATE.2018.8342160⟩ ; https://www.date-conference.com
Subject Terms: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.5: Heterogeneous (hybrid) systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.0: Adaptable architectures, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.4: Multiple-instruction-stream, multiple-data-stream processors (MIMD), ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.0: Code generation, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
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Source: Recercat. Dipósit de la Recerca de Catalunya
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)Subject Terms: multi-objective scheduling, Multisite cloud, [INFO.INFO-DB]Computer Science [cs]/Databases [cs.DB], Parallel processing (Electronic computers), Processament en paral·lel (Ordinadors), Enginyeria electrònica [Àrees temàtiques de la UPC], Scientific workflow, Workflow computing systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, 02 engineering and technology, Cicle de treball, Scientific workflow management system, multisite cloud, Multi-objective scheduling, 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-DB] Computer Science [cs]/Databases [cs.DB], Algorismes computacionals, parallel execution, Algorithms and architectures for advanced scientific computing, Àrees temàtiques de la UPC::Enginyeria electrònica, scientific workflow management system, Parallel execution
File Description: application/pdf
Access URL: https://upcommons.upc.edu/bitstream/2117/95941/1/Multi-objective%20scheduling%20of%20scientific%20workflows%20in%20Multisite.pdf
http://hdl.handle.net/2117/95941
https://upcommons.upc.edu/handle/2117/95941
https://core.ac.uk/display/81576844
https://www.sciencedirect.com/science/article/pii/S0167739X16300917
https://dblp.uni-trier.de/db/journals/fgcs/fgcs63.html#LiuPVOM16
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01342203/document
https://hal.archives-ouvertes.fr/lirmm-01342203 -
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Source: ACM Student Research Competition at Supercomputing. The International Conference for High Performance Computing, Networking, Storage and Analysis ; https://hal.science/hal-01739585 ; ACM Student Research Competition at Supercomputing. The International Conference for High Performance Computing, Networking, Storage and Analysis, Nov 2016, Salt Lake City, Utah, United States
Subject Terms: Exascale Computing, Energy Aware, Power Capping, Energy Efficiency, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.8: Performance/D.4.8.2: Monitors, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.8: Performance/D.4.8.1: Modeling and prediction, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]
Subject Geographic: Salt Lake City, Utah, United States
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16
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Source: IEEE Embedded Systems Letters. 7:7-10
Subject Terms: ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Channel leakage, multiport memory, common bus, ACM: B.: Hardware/B.7: INTEGRATED CIRCUITS/B.7.1: Types and Design Styles/B.7.1.7: VLSI (very large scale integration), 02 engineering and technology, 3. Good health, Network On Chip, crossbar switch), Security, 0202 electrical engineering, electronic engineering, information engineering, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.3: Interconnection architectures (e.g, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing
Access URL: https://hal.archives-ouvertes.fr/hal-01083270
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6994256
https://hal.inria.fr/hal-01253500
http://ieeexplore.ieee.org/document/6994256
https://ieeexplore.ieee.org/document/6994256
https://dblp.uni-trier.de/db/journals/esl/esl7.html#SepulvedaDSG15 -
17
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Source: https://hal.archives-ouvertes.fr/hal-03911564 ; 2022.
Subject Terms: ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.7: Natural Language Processing, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.6: Learning, ACM: I.: Computing Methodologies/I.2: ARTIFICIAL INTELLIGENCE/I.2.4: Knowledge Representation Formalisms and Methods, ACM: I.: Computing Methodologies/I.7: DOCUMENT AND TEXT PROCESSING, ACM: F.: Theory of Computation/F.1: COMPUTATION BY ABSTRACT DEVICES/F.1.1: Models of Computation/F.1.1.4: Self-modifying machines (e.g., neural networks), ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.7: Neural nets, ACM: F.: Theory of Computation/F.1: COMPUTATION BY ABSTRACT DEVICES/F.1.1: Models of Computation, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.5: Model Development, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], [INFO.INFO-BI]Computer Science [cs]/Bioinformatics [q-bio.QM], [INFO.INFO-CL]Computer Science [cs]/Computation and Language [cs.CL], [INFO.INFO-LG]Computer Science [cs]/Machine Learning [cs.LG], [INFO.INFO-TT]Computer Science [cs]/Document and Text Processing
Relation: hal-03911564; https://hal.archives-ouvertes.fr/hal-03911564; https://hal.archives-ouvertes.fr/hal-03911564/document; https://hal.archives-ouvertes.fr/hal-03911564/file/AliBERT_For_Submission.pdf
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Source: CARRV 2017 - 1st Workshop on Computer Architecture Research with RISC-V ; https://inria.hal.science/hal-01622208 ; CARRV 2017 - 1st Workshop on Computer Architecture Research with RISC-V, Oct 2017, Boston, United States. pp.6
Subject Terms: SIMT, SIMD, FPGA, RISC-V, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.7: Single-instruction-stream, multiple-data-stream processors (SIMD), [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]
Subject Geographic: Boston, United States
Time: Boston, United States
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19
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Source: IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition (DATE) ; https://inria.hal.science/hal-01423639 ; IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition (DATE), Mar 2017, Lausanne, Switzerland ; https://www.date-conference.com/
Subject Terms: ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.5: Heterogeneous (hybrid) systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.3: Other Architecture Styles/C.1.3.0: Adaptable architectures, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors)/C.1.2.4: Multiple-instruction-stream, multiple-data-stream processors (MIMD), ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.0: Code generation, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Subject Geographic: Lausanne, Switzerland
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Source: HiPEAC 2009 - High Performance and Embedded Architectures and Compilers ; https://hal.inria.fr/inria-00445970 ; HiPEAC 2009 - High Performance and Embedded Architectures and Compilers, Jan 2009, Paphos, Cyprus. ⟨10.1007/978-3-540-92990-1_15⟩
Subject Terms: ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems
Relation: inria-00445970; https://hal.inria.fr/inria-00445970
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