Výsledky vyhľadávania - acm: c.: computer systems organization/c.1: proceso architectures*

HARS: A Hardware-Assisted Runtime Software for embedded many-core architectures

Autori: Lhuillier, Y. Ojail, M. Guerre, A. a ďalší

Prispievatelia: Lhuillier, Y. Ojail, M. Guerre, A. a ďalší

Zdroj: ISSN: 1539-9087.

Predmety: B.5.0 [Register-Transfer-Level Implementation]: General, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.7: Organization and Design/D.4.7.4: Real-time systems and embedded systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, [INFO]Computer Science [cs]

Dostupnosť: https://cea.hal.science/cea-01818892
https://doi.org/10.1145/2517311

Introduction au parallélisme et aux architectures parallèles

Autori: Etiemble, Daniel Cappello, Franck Laboratoire de Recherche en Informatique (LRI) a ďalší

Prispievatelia: Etiemble, Daniel Cappello, Franck Laboratoire de Recherche en Informatique (LRI) a ďalší

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793592 ; 2017.

Predmety: pThreads, loi d'Amdhal, modèle Roofline, mémoires partagées et distribuées, parallélisme de données et de contrôle, modèles d'exécution, classification de Flynn, extensions SIMD, OpenMP, modèles de programmation, MPI, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnosť: https://hal.science/hal-01793592

Embedded Runtime for Reconfigurable Dataflow Graphs on Manycore Architectures

Autori: Miomandre, Hugo Hascoët, Julien Desnos, Karol a ďalší

Prispievatelia: Miomandre, Hugo Hascoët, Julien Desnos, Karol a ďalší

Zdroj: PARMA-DITAM ; https://hal.science/hal-01704702 ; PARMA-DITAM, Jan 2018, Manchester, United Kingdom. ⟨10.1145/3183767.3183780⟩

Predmety: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Geografické téma: Manchester, United Kingdom

Dostupnosť: https://hal.science/hal-01704702
https://hal.science/hal-01704702v1/document
https://hal.science/hal-01704702v1/file/parma-ditam18.pdf
https://doi.org/10.1145/3183767.3183780

Architectures and Mechanisms to Maintain efficiently Consistency in Collaborative Virtual Environments

Autori: Fleury, Cédric Duval, Thierry Gouranton, Valérie a ďalší

Prispievatelia: Fleury, Cédric Duval, Thierry Gouranton, Valérie a ďalší

Zdroj: SEARIS 2010 (IEEE VR 2010 Workshop on Software Engineering and Architectures for Realtime Interactive Systems) ; https://inria.hal.science/inria-00534082 ; SEARIS 2010 (IEEE VR 2010 Workshop on Software Engineering and Architectures for Realtime Interactive Systems), Mar 2010, Waltham, United States

Predmety: ACM: H.: Information Systems/H.5: INFORMATION INTERFACES AND PRESENTATION (e.g., HCI)/H.5.3: Group and Organization Interfaces/H.5.3.2: Computer-supported cooperative work, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems/C.2.4.1: Distributed applications, ACM: I.: Computing Methodologies/I.3: COMPUTER GRAPHICS/I.3.7: Three-Dimensional Graphics and Realism/I.3.7.6: Virtual reality, [INFO.INFO-GR]Computer Science [cs]/Graphics [cs.GR]

Geografické téma: Waltham, United States

Dostupnosť: https://inria.hal.science/inria-00534082
https://inria.hal.science/inria-00534082/document
https://inria.hal.science/inria-00534082/file/searis2010.pdf

Proceso de Lope de Vega por libelos contra unos cómicos / anotado por D. A. Tomillo y D. C. Pérez Pastor.., 1901

Autori: Pérez Pastor, Cristóbal, Auteur du texte Tomillo, Atanasio. Auteur du texte

Zdroj: Bibliothèque nationale de France, département Philosophie, histoire, sciences de l'homme, 8-OO-1246, 1901.

Relation: Notice du catalogue : http://catalogue.bnf.fr/ark:/12148/cb31479008k

Prístupová URL adresa: http://gallica.bnf.fr/ark:/12148/bpt6k1484166

Digital Systems Design

Autori: Sameni, Reza Shiraz University (Shiraz University)

Prispievatelia: Sameni, Reza Shiraz University (Shiraz University)

Zdroj: https://hal.science/cel-01815308 ; Engineering school. Iran. 2018.

Predmety: ACM: C.: Computer Systems Organization, ACM: B.: Hardware, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION/B.5.1: Design, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-LO]Computer Science [cs]/Logic in Computer Science [cs.LO]

Dostupnosť: https://hal.science/cel-01815308
https://hal.science/cel-01815308v1/document
https://hal.science/cel-01815308v1/file/CourseSlides2018.pdf

Synchronous byzantine agreement with nearly a cubic number of communication bits

Autori: Kowalski, Dariusz R. Mostefaoui, Achour Department of Computer Science Liverpool a ďalší

Prispievatelia: Kowalski, Dariusz R. Mostefaoui, Achour Department of Computer Science Liverpool a ďalší

Zdroj: ACM symposium on Principles of distributed computing (PODC'13) ; https://hal.science/hal-01151136 ; ACM symposium on Principles of distributed computing (PODC'13), Jul 2013, New-York, United States. pp.84-91, ⟨10.1145/2484239.2484271⟩

Predmety: Agreement problem, Synchronous distributed system, Byzantine process, Message-passing model, Round-based protocol, EIG, Consensus, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.4: Parallel Architectures/C.1.4.0: Distributed architectures, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.7: Organization and Design/D.4.7.1: Distributed systems, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.5: Reliability/D.4.5.2: Fault-tolerance, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management/D.4.1.0: Concurrency, ACM: D.: Software/D.4: OPERATING SYSTEMS/D.4.1: Process Management/D.4.1.5: Synchronization, [INFO]Computer Science [cs], [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], [INFO.INFO-DS]Computer Science [cs]/Data Structures and Algorithms [cs.DS]

Geografické téma: New-York, United States

Dostupnosť: https://hal.science/hal-01151136
https://hal.science/hal-01151136v1/document
https://hal.science/hal-01151136v1/file/podc%20final.pdf
https://doi.org/10.1145/2484239.2484271

Skewed Compressed Cache

Autori: Sardashti, Somayeh Seznec, André Wood, David A. a ďalší

Prispievatelia: Sardashti, Somayeh Seznec, André Wood, David A. a ďalší

Zdroj: Proceeding of the 47th Annual IEEE/ACM International Symposium on Microarchitecture ; MICRO - 47th Annual IEEE/ACM International Symposium on Microarchitecture ; https://inria.hal.science/hal-01088050 ; MICRO - 47th Annual IEEE/ACM International Symposium on Microarchitecture, Dec 2014, Cambridge, United Kingdom

Predmety: component, cache design, compression, performance, energy, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Cambridge, United Kingdom

Relation: info:eu-repo/grantAgreement//267175/EU/Defying Amdahl\'s Law/DAL

Dostupnosť: https://inria.hal.science/hal-01088050
https://inria.hal.science/hal-01088050/document
https://inria.hal.science/hal-01088050/file/scc%20october%202%20%281%29.pdf

Exploring branch predictability limits with the MTAGE+SC predictor *

Autori: Seznec, André Pushing Architecture and Compilation for Application Performance (PACAP) Inria Rennes – Bretagne Atlantique a ďalší

Prispievatelia: Seznec, André Pushing Architecture and Compilation for Application Performance (PACAP) Inria Rennes – Bretagne Atlantique a ďalší

Zdroj: 5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5)
https://inria.hal.science/hal-01354251
5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5), Jun 2016, Seoul, South Korea. pp.4
http://www.jilp.org/cbp2016/

Predmety: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures/C.1.1.1: Pipeline processors, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Seoul, South Korea

Dostupnosť: https://inria.hal.science/hal-01354251
https://inria.hal.science/hal-01354251v1/document
https://inria.hal.science/hal-01354251v1/file/MutiTage-SC.pdf

UniWiki: A Reliable and Scalable Peer-to-Peer System for Distributing Wiki Applications

Autori: Oster, Gérald Molli, Pascal Dumitriu, Sergiu a ďalší

Prispievatelia: Oster, Gérald Molli, Pascal Dumitriu, Sergiu a ďalší

Zdroj: https://inria.hal.science/inria-00364462 ; [Research Report] RR-6848, INRIA. 2009, pp.18.

Predmety: Collaborative editing, Optimistic replication, Peer-to-peer, Distributed interception, Wiki, ACM: C.: Computer Systems Organization/C.2: COMPUTER-COMMUNICATION NETWORKS/C.2.4: Distributed Systems/C.2.4.1: Distributed applications, ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.11: Software Architectures, ACM: H.: Information Systems/H.5: INFORMATION INTERFACES AND PRESENTATION (e.g., HCI)/H.5.3: Group and Organization Interfaces/H.5.3.2: Computer-supported cooperative work, HCI)/H.5.3: Group and Organization Interfaces/H.5.3.6: Theory and models, ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.8: Metrics/D.2.8.1: Performance measures, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH]

Dostupnosť: https://inria.hal.science/inria-00364462
https://inria.hal.science/inria-00364462v1/document
https://inria.hal.science/inria-00364462v1/file/RR-6848.pdf

Yet Another Compressed Cache: a Low Cost Yet Effective Compressed Cache

Autori: Sardashti, Somayeh Seznec, André Wood, David A. a ďalší

Prispievatelia: Sardashti, Somayeh Seznec, André Wood, David A. a ďalší

Zdroj: ISSN: 1544-3566.

Predmety: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors), [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: info:eu-repo/grantAgreement//267175/EU/Defying Amdahl\'s Law/DAL

Dostupnosť: https://inria.hal.science/hal-01354248
https://inria.hal.science/hal-01354248v1/document
https://inria.hal.science/hal-01354248v1/file/yacc-taco-july%2022-final.pdf
https://doi.org/10.1145/2976740

Evolution de l'architecture des ordinateurs

Autori: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Prispievatelia: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793615 ; 2016.

Predmety: mur de la chaleur, mur mémoire, technologie CMOS, GPU, multi-cœur, CPU, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnosť: https://hal.science/hal-01793615

Hiérarchie mémoire : les caches

Autori: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a ďalší

Prispievatelia: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a ďalší

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01794025 ; 2012.

Predmety: fonctionnement des caches, cohérence des caches, caches multiprocesseurs et multicoeurs, optimisations logicielles, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnosť: https://hal.science/hal-01794025

Extensions SIMD des jeux d'instructions

Autori: Etiemble, Daniel Lacassagne, Lionel Laboratoire de Recherche en Informatique (LRI) a ďalší

Prispievatelia: Etiemble, Daniel Lacassagne, Lionel Laboratoire de Recherche en Informatique (LRI) a ďalší

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793974 ; Techniques de l'Ingénieur, 2015.

Predmety: Instructions SIMD, SSE, intrinsèque, vectorisation, Altivec, Neon, AVX, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnosť: https://hal.science/hal-01793974

TAGE-SC-L Branch Predictors

Autori: Seznec, André Amdahl's Law is Forever (ALF) Inria Rennes – Bretagne Atlantique a ďalší

Prispievatelia: Seznec, André Amdahl's Law is Forever (ALF) Inria Rennes – Bretagne Atlantique a ďalší

Zdroj: Proceedings of the 4th Championship Branch Prediction ; JILP - Championship Branch Prediction ; https://inria.hal.science/hal-01086920 ; JILP - Championship Branch Prediction, Jun 2014, Minneapolis, United States ; http://www.jilp.org/cbp2014/

Predmety: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Minneapolis, United States

Relation: info:eu-repo/grantAgreement//267175/EU/Defying Amdahl\'s Law/DAL

Dostupnosť: https://inria.hal.science/hal-01086920
https://inria.hal.science/hal-01086920/document
https://inria.hal.science/hal-01086920/file/CBP4-TAGE-SC-L.pdf

Jeux d'instructions des processeurs

Autori: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Prispievatelia: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Zdroj: https://hal.science/hal-01794009 ; 2016.

Predmety: CISC, format d'instructions, type d'instructions, RISC, interface matériel-logiciel, jeu d'instructions, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnosť: https://hal.science/hal-01794009

Processeurs superscalaires 'flots de données'

Autori: Anceau, François Etiemble, Daniel Circuits Intégrés Numériques et Analogiques (CIAN) a ďalší

Prispievatelia: Anceau, François Etiemble, Daniel Circuits Intégrés Numériques et Analogiques (CIAN) a ďalší

Zdroj: https://hal.science/hal-01793606 ; 2018.

Predmety: superscalaire, parpallélisme d’instruction, flot de données, renommage de registres, stations de réservation, tampon de réordonnancement, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnosť: https://hal.science/hal-01793606

Processeurs superscalaires multi-pipelines

Autori: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a ďalší

Prispievatelia: Etiemble, Daniel Anceau, François Laboratoire de Recherche en Informatique (LRI) a ďalší

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793667 ; 2015.

Predmety: superscalaire, multi-pipeline, lancement des instructions, parallélisme d'instructions, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnosť: https://hal.science/hal-01793667

Introduction aux systèmes embarqués, enfouis et mobiles

Autori: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Prispievatelia: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793572 ; 2016.

Predmety: temps réel, énergie, taille, coût, systèmes de communication, systèmes de contrôle, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs]

Dostupnosť: https://hal.science/hal-01793572

Processeurs VLIW

Autori: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Prispievatelia: Etiemble, Daniel Laboratoire de Recherche en Informatique (LRI) Université Paris-Sud - Paris 11 (UP11)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)

Zdroj: ISSN: 1776-0860 ; Techniques de l'Ingénieur ; https://hal.science/hal-01793958 ; 2015.

Predmety: Parallélisme d'instructions, VLIW, pipeline logiciel, traitement du signal, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO]Computer Science [cs], [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Dostupnosť: https://hal.science/hal-01793958