Search Results - acm: c.: computer systems organizacia/c.1: process architectures/c.1.4: parallel architectures*

Modelling parallel programs and multiprocessor architectures with AXE

Authors: Yan, Jerry C Fineman, Charles E

Subject Terms: Computer Systems

Access URL: https://ntrs.nasa.gov/citations/19910015479

Parallel VLSI Architectures for Multi-Gbps MIMO Communication Systems

Thesis Advisors: Cavallaro, Joseph R.

Subject Terms: Applied sciences, Parallel architectures, VLSI, MIMO, Turbo decoders, Low-density parity-check codes, Computer Engineering, Electrical engineering

File Description: 240 p.; application/pdf

Availability: http://hdl.handle.net/1911/70461

Time-Dependent Density-Functional Theory in Massively Parallel Computer Architectures: The Octopus Project

Authors: Andrade, Xavier Alberdi-Rodriguez, Joseba Strubbe, David A. et al.

Source: Andrade, Xavier, Joseba Alberdi-Rodriguez, David A. Strubbe, Micael J. T. Oliveira, Fernando Nogueira, Alberto Castro, Javier Muguerza, et al. 2012. "Time-Dependent Density-Functional Theory in Massively Parallel Computer Architectures: The Octopus Project." Journal of Physics: Condensed Matter 24(23): 233202. doi:10.1088/0953-8984/24/23/233202.

Subject Terms: atomic physics, molecular physics, computational physics, instrumentation, measurement

File Description: application/pdf

Relation: Journal of Physics: Condensed Matter

Access URL: http://nrs.harvard.edu/urn-3:HUL.InstRepos:12694642

Evaluation of existing and proposed computer architectures for future ground-based systems

Authors: Schulbach, C

Subject Terms: Computer Systems

Access URL: https://ntrs.nasa.gov/citations/19860028202

Parallel Computer Architectures for the SPMD Programming Model

Authors: 北島宏之 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3177822

Degree: 博士 (情報科学) -- 東北大学

Study on architectures for parallel opto-electronic computer

Authors: 林森茂 [著]

File Description: image/jp2

Access URL: https://ndlsearch.ndl.go.jp/books/R100000039-I3116433

Degree: 博士 (工学) -- 東京工業大学

Revisiting Database Indexing for Parallel and Accelerated Computing: A Comprehensive Study and Novel Approaches.

Authors: Abbasi, Maryam Bernardo, Marco V. Váz, Paulo et al.

Source: Information. Aug2024, Vol. 15 Issue 8, p429. 20p.

Subject Terms: *Databases, *Computer systems, Process capability, Heterogeneous computing, Reinforcement learning

Parallel architectures for computing cyclic convolutions

Authors: Yeh, C.-S Reed, I. S Truong, T. K

Source: IEE Proceedings, Part F - Communications, Radar and Signal Processing. 130(5 Au)

Subject Terms: Computer Operations And Hardware

Access URL: https://ntrs.nasa.gov/citations/19830062461

Platform-Based Design From Parallel C Specifications.

Authors: Augé, Ivan Pétrot, Frédéric Donnet, François et al.

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Dec2005, Vol. 24 Issue 12, p1811-1826. 16p.

Subject Terms: *COMPUTER operating systems, *INTEGRATED circuits, *SYSTEMS design, *COMPUTER software, MIMD computers, ELECTRONIC systems

Swarm Processor System: hardware process scheduler based energy efficient multi-core system

Authors: Sang-Min Lee Seung Hun Kim Won Seob Jeong et al.

Source: IEICE Electronics Express. 2014, 11(14):20140424

Advanced Computer Architectures.

Authors: Fox, Geoffrey C. Messina, Paul C.

Source: Scientific American. Oct 1987 257(4):66-74.

Peer Reviewed: N

Page Count: 9

Descriptors: Computer Software, Computers, Efficiency, Information Technology, Input Output, Input Output Devices, Problem Solving, Programing, Programing Languages, Science and Society, Systems Approach, Technological Advancement, Technology

Journal Code: CIJJAN1988

Parallel algorithms and architectures for LDPC Decoding

Authors: Fernandes, Gabriel Falcão Paiva

Source: FERNANDES, Gabriel Falcão Paiva - Parallel algorithms and architectures for LDPC decoding [em linha]. Coimbra : [s.n], 2010. [Consult. Dia Mês Ano]. Tese de doutoramento. Disponível na WWW:<http://hdl.handle.net/10316/14583>

Subject Terms: Computação paralela, Arquitectura de computadores

Availability: https://hdl.handle.net/10316/14583

Um processo de gera??o autom?tica de c?digo paralelo para arquiteturas h?bridas com afinidade de mem?ria

An automatic parallel code generation process for hybrid architectures using memory affinity

Authors: Raeder, Mateus

Thesis Advisors: Fernandes, Luiz Gustavo Le?o

Source: Biblioteca Digital de Teses e Dissertações da PUC_RSPontifícia Universidade Católica do Rio Grande do SulPUC_RS.

Subject Terms: Programa??o H?brida, Afinidade de Mem?ria, Cluster de NUMA, CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO

File Description: application/pdf

Relation: 1974996533081274470; 600; -3008542510401149144; 3671711205811204509

Availability: http://tede2.pucrs.br/tede2/handle/tede/7390

Designing High Performance Shared-Address-Space and Adaptive Communication Middlewares for Next-Generation HPC Systems

Authors: Hashmi, Jahanzeb Maqbool

Subject Terms: Computer Science, Communication Middlewares, Optimized Design, Process Mapping, HPC, Multi-core, Many-core, Parallel Computing, High-End Systems, Cloud Computing, Zero-copy Communication, Shared Address Space Communication, Emerging Architectures, MPI

Availability: http://rave.ohiolink.edu/etdc/view?acc_num=osu1588038721555713

Programming methodologies for ADAS applications in parallel heterogeneous architectures

Méthodologies de programmation d'applications ADAS sur des architectures parallèles et hétérogènes

Authors: Dekkiche, Djamila

Thesis Advisors: Université Paris-Saclay (ComUE), Mérigot, Alain

Subject Terms: ADAS, Traitement parallèle, Computer vision, Systèmes embarqués, Parallel computing, Embedded systems

Availability: http://www.theses.fr/2017SACLS388/document

Commissioning Experience With the ATLAS Level-1 Calorimeter Trigger System.

Authors: Achenbach, R. Adragna, P. Andrei, V. et al.

Source: IEEE Transactions on Nuclear Science. Feb2008 Part 1 of 3, Vol. 55 Issue 1, p99-105. 7p. 6 Diagrams, 1 Chart, 1 Graph.

Subject Terms: *COMPUTER architecture, *COMPUTER input-output equipment, PARALLEL computers, DATA pipelining, REAL-time programming, TRIGGER circuits, CALORIMETERS

Cyclical processor and computer architectures for highly parallel applications

Authors: Wong, Fut-Suan

Availability: http://hdl.handle.net/2429/25646

Parallel Architectures.

Authors: Flynn, Michael J. Rudd, Kevin W.

Source: ACM Computing Surveys. Mar96, Vol. 28 Issue 1, p67-70. 4p.

Subject Terms: *COMPUTERS, *MULTIPROCESSORS, *COMPUTER systems, MATHEMATICAL combinations, ENGINEERING models, SYSTOLIC array circuits

Parallel Marching Blocks: A Practical Isosurfacing Algorithm for Large Data on Many-Core Architectures.

Authors: Liu, Baoquan Clapworthy, Gordon J. Dong, Feng et al.

Source: Computer Graphics Forum. Jun2016, Vol. 35 Issue 3, p211-220. 10p. 3 Color Photographs, 4 Diagrams, 3 Charts, 1 Graph.

Subject Terms: *BIG data, *DATA mining, *ELECTRONIC data processing, *ALGORITHMS, *COMPUTER programming

Yali : uma extensão do modelo linda para programação paralela em redes heterogêneas

Yali, an extension to the linda model intended for parallel programming in heterogeneous computer networks

Authors: Charao, Andrea Schwertner

Thesis Advisors: Costa, Celso Maciel da, Geyer, Claudio Fernando Resin

Source: Biblioteca Digital de Teses e Dissertações da UFRGSUniversidade Federal do Rio Grande do SulUFRGS.

Subject Terms: Sistemas operacionais, Programação paralela, Sistemas distribuidos, Parallel programming, Linda, Heterogeneity, Distributed systems

File Description: application/pdf

Availability: http://hdl.handle.net/10183/21455